EP 1186071 A4 20020904 - DELAY LINE FILTER
Title (en)
DELAY LINE FILTER
Title (de)
VERZÖGERUNGSLEITUNGSFILTER
Title (fr)
FILTRE LIGNE A RETARD
Publication
Application
Priority
- US 0016257 W 20000614
- US 13865199 P 19990614
- US 14869099 P 19990816
- US 19524600 P 20000407
Abstract (en)
[origin: WO0101511A1] A delay circuit (28) configured to include a delay compensating circuit (29) coupled in series with an integrated filter circuit (30). The delay compensating circuit (29) comprises a miniaturized 3db quadrature hybrid coupler (40) having first, second, third, and fourth ports, and a first resonator (41) and a second resonator (46) formed from lumped elements, respectively coupled to the second and third ports; and the filter circuit (30) comprises a plurality of lumped elements coupled in series with the delay compensating circuit (29) to one of the first and second ports.
IPC 1-7
IPC 8 full level
H01P 1/205 (2006.01); H01P 9/00 (2006.01); H03F 1/32 (2006.01)
CPC (source: EP)
H01P 1/205 (2013.01); H01P 9/00 (2013.01); H03F 1/3229 (2013.01); H03F 2200/198 (2013.01)
Citation (search report)
- [DY] US 3277403 A 19661004 - COHN SEYMOUR B
- [Y] US 3768045 A 19731023 - CHUNG S
- [A] US 5045821 A 19910903 - STAUDINGER JOSEPH [US], et al
- [A] GB 2295928 A 19960612 - FUJITSU LTD [JP]
- [A] MANTON R G: "HYBRID NETWORKS AND THEIR USES IN RADIO-FREQUENCY CIRCUITS", RADIO AND ELECTRONIC ENGINEER, INSTITUTION OF ELECTRONIC AND RADIO ENGINEERS. LONDON, GB, vol. 54, no. 11/12, 1 November 1984 (1984-11-01), pages 473 - 489, XP002032789, ISSN: 0033-7722
- See references of WO 0101511A1
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
DOCDB simple family (publication)
WO 0101511 A1 20010104; WO 0101511 A9 20020613; AU 5872400 A 20010131; EP 1186071 A1 20020313; EP 1186071 A4 20020904
DOCDB simple family (application)
US 0016257 W 20000614; AU 5872400 A 20000614; EP 00944661 A 20000614