Global Patent Index - EP 1240670 A1

EP 1240670 A1 20020918 - NON-VOLATILE NOR SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR THE PROGRAMMING THEREOF

Title (en)

NON-VOLATILE NOR SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR THE PROGRAMMING THEREOF

Title (de)

NICHTFLÜCHTIGE NOR-HALBLEITERSPEICHEREINRICHTUNG UND VERFAHREN ZU DEREN PROGRAMMIERUNG

Title (fr)

MEMOIRE NON-OU A SEMICONDUCTEURS NON VOLATILE ET PROCEDE POUR PROGRAMMER CETTE DERNIERE

Publication

EP 1240670 A1 20020918 (DE)

Application

EP 99968315 A 19991220

Priority

DE 9904042 W 19991220

Abstract (en)

[origin: WO0147019A1] The invention relates to a non-volatile NOR semiconductor memory device and method for the programming thereof, whereby a number of single transistor memory cells (SZ), arranged in the form of a matrix, may be controlled by either word lines (WL) or by bit lines (BL). Each single transistor memory cell (SZ), thus possesses both a source line (S1, S2) and a drain line (D1, D2), by means of which a selective control of the respective source and drain regions (D, S) is achieved. The leak current can thus be optimally reduced in the semiconductor memory device with minimal space requirement.

IPC 1-7

H01L 27/115

IPC 8 full level

G11C 16/04 (2006.01); H01L 27/115 (2006.01); H01L 27/11519 (2017.01); H01L 27/11521 (2017.01)

CPC (source: EP US)

G11C 16/0416 (2013.01 - EP US); H10B 41/10 (2023.02 - EP US); H10B 41/30 (2023.02 - EP US)

Citation (search report)

See references of WO 0147019A1

Designated contracting state (EPC)

AT BE CH DE FR GB LI

DOCDB simple family (publication)

WO 0147019 A1 20010628; EP 1240670 A1 20020918; US 2003007386 A1 20030109; US 6654281 B2 20031125

DOCDB simple family (application)

DE 9904042 W 19991220; EP 99968315 A 19991220; US 17788402 A 20020620