EP 1242827 A1 20020925 - METHOD AND DEVICE FOR TESTING CIRCUIT BOARDS
Title (en)
METHOD AND DEVICE FOR TESTING CIRCUIT BOARDS
Title (de)
VERFAHREN UND VORRICHTUNG ZUM TESTEN VON LEITERPLATTEN
Title (fr)
PROCEDE ET DISPOSITIF POUR TESTER DES CARTES DE CIRCUITS
Publication
Application
Priority
- DE 19957286 A 19991129
- EP 0009568 W 20000929
Abstract (en)
[origin: WO0140809A1] The invention relates to a method and device for testing circuit boards (5), by means of a parallel tester, comprising a contact arrangement, with several test contacts for simultaneous contacting of several circuit board test points (4), on a circuit board under test. Said method comprises the following steps: placing the circuit board to be tested on the contact arrangement, such that at least the circuit board test points of a first region (I), on the circuit board to be tested, are in contact with test contacts of a first region of the contact arrangement; carrying out a first test process in said first region; moving the circuit board, in relation to the test arrangement, by a predetermined amount, such that at least circuit board test points of a second region of the circuit board to be tested come into contact with test contacts of a second region (II), of the contact arrangement; carrying out a second test measurement process in said second region. The disclosed method permits circuit boards with a warp or misalignment to be tested with a parallel tester.
IPC 1-7
IPC 8 full level
G01R 31/28 (2006.01)
CPC (source: EP)
G01R 31/2808 (2013.01); G01R 31/2805 (2013.01)
Citation (search report)
See references of WO 0140809A1
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
DOCDB simple family (publication)
WO 0140809 A1 20010607; DE 19957286 A1 20010705; EP 1242827 A1 20020925
DOCDB simple family (application)
EP 0009568 W 20000929; DE 19957286 A 19991129; EP 00964256 A 20000929