EP 1246197 B1 20080528 - Circuit and method for erasing or programming a memory cell
Title (en)
Circuit and method for erasing or programming a memory cell
Title (de)
Schaltung und Verfahren zum Löschen oder Programmieren einer Speicherzelle
Title (fr)
Circuit et procédé associé d'effacement ou de programmation d'une cellule mémoire
Publication
Application
Priority
FR 0103284 A 20010312
Abstract (en)
[origin: US2002126534A1] A circuit produces a voltage for the erasure or programming of a memory cell. The circuit includes a capacitor, and a discharge circuit connected to a first terminal of the capacitor. The discharge circuit includes a first transistor, a drain of which is connected to the first terminal of the capacitor. The first transistor activates the discharge circuit when a discharge signal is received by a gate of the first transistor. The discharge circuit includes a slow discharge arm and a fast discharge arm parallel-connected to the source of the first transistor. The discharge circuit produces a low discharge current or a high discharge current for discharging the capacitor as a function of an operating mode selection signal.
IPC 8 full level
G11C 16/12 (2006.01)
CPC (source: EP US)
G11C 16/12 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB IT
DOCDB simple family (publication)
US 2002126534 A1 20020912; US 6621737 B2 20030916; DE 60226800 D1 20080710; EP 1246197 A1 20021002; EP 1246197 B1 20080528; FR 2821974 A1 20020913; FR 2821974 B1 20030523
DOCDB simple family (application)
US 9653102 A 20020311; DE 60226800 T 20020305; EP 02366003 A 20020305; FR 0103284 A 20010312