EP 1269204 A2 20030102 - TEST CIRCUIT CONFIGURATION AND METHOD FOR TESTING A LARGE NUMBER OF TRANSISTORS
Title (en)
TEST CIRCUIT CONFIGURATION AND METHOD FOR TESTING A LARGE NUMBER OF TRANSISTORS
Title (de)
TEST-SCHALTUNGSANORDNUNG UND VERFAHREN ZUM TESTEN EINER VIELZAHL VON TRANSISTOREN
Title (fr)
AGENCEMENT DE CIRCUITS DE TEST ET PROCEDE PERMETTANT DE TESTER PLUSIEURS TRANSISTORS
Publication
Application
Priority
- DE 0100835 W 20010305
- DE 10011657 A 20000310
Abstract (en)
[origin: WO0167601A2] The invention relates to a test circuit configuration. Every gate terminal of a transistor to be tested is coupled to a gate voltage source in such a manner that the gate voltage can be measured and adjusted individually on every gate terminal. The source terminal of every transistor to be tested can be coupled to the source voltage source in such a manner that the source voltage can be measured and adjusted individually on every source terminal.
IPC 1-7
IPC 8 full level
G01R 31/27 (2006.01); G01R 31/30 (2006.01); G11C 29/50 (2006.01); G01R 31/26 (2014.01)
CPC (source: EP KR US)
G01R 31/275 (2013.01 - EP US); G01R 31/3004 (2013.01 - EP US); G11C 29/00 (2013.01 - KR); G11C 29/028 (2013.01 - EP US); G11C 29/50 (2013.01 - EP US); G01R 31/2621 (2013.01 - EP US); G11C 2029/5004 (2013.01 - EP US)
Citation (search report)
See references of WO 0167601A2
Designated contracting state (EPC)
DE FR IT
DOCDB simple family (publication)
WO 0167601 A2 20010913; WO 0167601 A3 20020425; EP 1269204 A2 20030102; KR 20020081417 A 20021026; US 2003112028 A1 20030619; US 6873173 B2 20050329
DOCDB simple family (application)
DE 0100835 W 20010305; EP 01915081 A 20010305; KR 20027011777 A 20020909; US 22044903 A 20030113