Global Patent Index - EP 1281262 A4

EP 1281262 A4 20080910 - SYSTEM AND METHOD FOR PEAK POWER REDUCTION IN SPREAD SPECTRUM COMMUNICATIONS SYSTEMS

Title (en)

SYSTEM AND METHOD FOR PEAK POWER REDUCTION IN SPREAD SPECTRUM COMMUNICATIONS SYSTEMS

Title (de)

SYSTEM UND VERFAHREN ZUR VERMINDERUNG DER SPITZENLEISTUNG IN SPREIZSPEKTRUM-KOMMUNIKATIONS-SYSTEMEN

Title (fr)

SYSTEME ET PROCEDE DE REDUCTION DE PUISSANCE DE CRETE DANS DES SYSTEMES DE COMMUNICATIONS A SPECTRE ETALE

Publication

EP 1281262 A4 20080910 (EN)

Application

EP 01913130 A 20010228

Priority

  • US 0106317 W 20010228
  • US 19851600 P 20000419
  • US 21289200 P 20000620
  • US 74616700 A 20001222

Abstract (en)

[origin: CA2406757A1] A system and method for signal peak reduction in a spread spectrum communication system of the type including a filter for limiting signal bandwidth of symbols transmitted from the system. A signal peak reduction un it (122) is provided before the filter (126) the includes a filter predictor (146) that predicts the effect of that filter on input symbols by using filt er coefficient values corresponding to the filter impulse response function. Input symbols that are predicted to cause the output signal to exceed a predetermined peak limit value are adjusted. Several examples of suitable algorithms for calculating the necessary peak reduction to be applied to the input symbols are disclosed. The peak reduction unit provides adjusted symbo ls to the filter for processing and communication system output.

IPC 1-7

H04L 1/00; H04L 25/08; H03D 1/04; H03D 1/06; H03K 5/02; H03K 6/04; H04B 1/10; H04L 27/26

IPC 8 full level

H04B 1/707 (2006.01); H04L 25/03 (2006.01); H04L 27/26 (2006.01); H04L 27/36 (2006.01)

CPC (source: EP KR)

H04B 1/707 (2013.01 - EP); H04J 13/10 (2013.01 - KR); H04L 25/03343 (2013.01 - EP); H04L 27/2614 (2013.01 - EP); H04L 27/366 (2013.01 - EP); H04W 52/36 (2013.01 - KR); H04B 2201/70706 (2013.01 - EP); H04L 27/2621 (2013.01 - EP)

Citation (search report)

  • [XY] EP 0993136 A1 20000412 - MATSUSHITA ELECTRIC IND CO LTD [JP]
  • [A] US 6009090 A 19991228 - OISHI YASUYUKI [JP], et al
  • [Y] US 6049535 A 20000411 - OZLUTURK FATIH [US], et al
  • [A] US 5418813 A 19950523 - SCHAFFNER TERRY M [US], et al
  • [A] MEGIDDO, M.: "Applying Parallel Computation Algorithms in the Design of Serial Algorithms", JOURNAL OF THE ACM (JACM), vol. 30, no. 4, October 1983 (1983-10-01), New York, pages 852 - 865, XP002471234, Retrieved from the Internet <URL:http://delivery.acm.org/10.1145/330000/322410/p852-megiddo.pdf?key1=322410&key2=2392034021&coll=ACM&dl=ACM&CFID=18269158&CFTOKEN=37942267> [retrieved on 20080229]
  • See references of WO 0182547A1

Designated contracting state (EPC)

FI FR GB SE

DOCDB simple family (publication)

AU 4182501 A 20011107; CA 2406757 A1 20011101; CA 2406757 C 20040323; CN 1284345 C 20061108; CN 1425242 A 20030618; EP 1281262 A1 20030205; EP 1281262 A4 20080910; KR 100466057 B1 20050113; KR 20020089512 A 20021129

DOCDB simple family (application)

AU 4182501 A 20010228; CA 2406757 A 20010228; CN 01808283 A 20010228; EP 01913130 A 20010228; KR 20027014082 A 20021019