EP 1288962 A2 20030305 - Semiconductor memory device including shadow RAM
Title (en)
Semiconductor memory device including shadow RAM
Title (de)
Halbleiterspeicheranordnung mit einem latenten RAM Speicher
Title (fr)
Dispositif de mémoire à semiconducteurs comprenant une mémoire latente
Publication
Application
Priority
JP 2001266933 A 20010904
Abstract (en)
There is provided a semiconductor memory device for preventing an increase of a cell area of a Shadow RAM comprising a portion of an SRAM memory cell and a ferroelectric capacitor connected to a storage node of the portion of the SRAM memory cell and achieving high capacitance formation of a storage capacitor. The Shadow RAM is provided with a relay wiring layer between a wiring layer corresponding to the storage node and a lower electrode of the ferroelectric capacitor, a wiring corresponding to the storage node is connected to a relay wiring via a first and a second opening portion arranged at a first interval and the lower electrode of the ferroelectric capacitor is connected to a relay wiring via a third and a fourth opening portion arranged at a second interval narrower than the first interval. <IMAGE>
IPC 1-7
IPC 8 full level
H10B 10/00 (2023.01); G11C 14/00 (2006.01); H10B 20/00 (2023.01)
CPC (source: EP KR US)
G11C 14/00 (2013.01 - EP US); H10B 10/00 (2023.02 - KR)
Designated contracting state (EPC)
DE FR
DOCDB simple family (publication)
EP 1288962 A2 20030305; EP 1288962 A3 20050112; CN 1411072 A 20030416; JP 2003078037 A 20030314; KR 20030020857 A 20030310; TW 558830 B 20031021; US 2003043618 A1 20030306; US 6836428 B2 20041228
DOCDB simple family (application)
EP 02019732 A 20020903; CN 02149893 A 20020904; JP 2001266933 A 20010904; KR 20020053269 A 20020904; TW 91120014 A 20020903; US 23267202 A 20020903