Global Patent Index - EP 1295396 A2

EP 1295396 A2 20030326 - CALIBRATION DEVICE AND METHOD FOR GENERATING THE CLOCK PULSE IN AN INTEGRATED CIRCUIT

Title (en)

CALIBRATION DEVICE AND METHOD FOR GENERATING THE CLOCK PULSE IN AN INTEGRATED CIRCUIT

Title (de)

KALIBRIERVORRICHTUNG UND -VERFAHREN FÜR DIE TAKTGENERIERUNG AUF EINEM INTEGRIERTEN SCHALTKREIS

Title (fr)

DISPOSITIF ET PROCEDE D'ETALONNAGE POUR LA GENERATION D'HORLOGE DANS UN CIRCUIT DE COMMUTATION INTEGRE

Publication

EP 1295396 A2 20030326 (DE)

Application

EP 01949212 A 20010517

Priority

  • DE 0101911 W 20010517
  • DE 10029421 A 20000615

Abstract (en)

[origin: WO0197383A2] The invention relates to the creation of a precise frequency standard (5) in an integrated circuit, by activating a reference oscillator (6) at specific intervals and by calibrating the local oscillator (2). To achieve this, a calibration circuit (8), which determines the pulse ratio between the internal clock pulse (3) and the reference clock pulse (7), is provided. The pulse ratio that has been determined is used to programme a frequency divider (4). The invention is particularly suitable for use in mobile radio devices.

IPC 1-7

H03L 7/00

IPC 8 full level

H03L 7/06 (2006.01); H03L 1/00 (2006.01); H03L 7/00 (2006.01)

CPC (source: EP US)

H03L 1/00 (2013.01 - EP US); H03L 7/00 (2013.01 - EP US)

Citation (search report)

See references of WO 0197383A2

Designated contracting state (EPC)

AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

DOCDB simple family (publication)

WO 0197383 A2 20011220; WO 0197383 A3 20020627; CN 1436402 A 20030813; DE 10029421 A1 20020103; DE 10029421 C2 20020711; EP 1295396 A2 20030326; JP 2004503977 A 20040205; US 2003095008 A1 20030522; US 6885254 B2 20050426

DOCDB simple family (application)

DE 0101911 W 20010517; CN 01811235 A 20010517; DE 10029421 A 20000615; EP 01949212 A 20010517; JP 2002511474 A 20010517; US 32012502 A 20021216