EP 1335210 A2 20030813 - High speed interconnect circuit test method and apparatus
Title (en)
High speed interconnect circuit test method and apparatus
Title (de)
Methode und Vorrichtung zum Testen von Hochgeschwindigkeits-Verbindungsschaltungen
Title (fr)
Méthode et appareil pour tester des circuits d'interconnection à grande vitesse
Publication
Application
Priority
- US 35658202 P 20020211
- US 38704302 P 20020610
Abstract (en)
A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry and the boundary scan cells are required to implement the additional instructions. The instructions are extensions of the conventional JTAG operating structure. <IMAGE>
IPC 1-7
IPC 8 full level
G01R 31/28 (2006.01); G01R 31/3185 (2006.01); G06F 11/22 (2006.01)
CPC (source: EP KR)
G01R 31/28 (2013.01 - KR); G01R 31/318552 (2013.01 - EP); G01R 31/31858 (2013.01 - EP); G01R 31/318555 (2013.01 - EP)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 1335210 A2 20030813; EP 1335210 A3 20040915; EP 1335210 B1 20061122; CN 100523847 C 20090805; CN 1438492 A 20030827; DE 60309761 D1 20070104; DE 60309761 T2 20071011; JP 2003344508 A 20031203; JP 4216625 B2 20090128; KR 101007766 B1 20110114; KR 20030068052 A 20030819; TW 200303425 A 20030901; TW I264555 B 20061021
DOCDB simple family (application)
EP 03100257 A 20030207; CN 03104139 A 20030211; DE 60309761 T 20030207; JP 2003072799 A 20030210; KR 20030008324 A 20030210; TW 92102750 A 20030211