EP 1347593 A1 20030924 - TRANSMITTER, RECEIVER, AND COMMUNICATION METHOD
Title (en)
TRANSMITTER, RECEIVER, AND COMMUNICATION METHOD
Title (de)
SENDER, EMPFÄNGER UND KOMMUNIKATIONSVERFAHREN
Title (fr)
EMETTEUR, RECEPTEUR ET PROCEDE DE COMMUNICATION
Publication
Application
Priority
- JP 0111448 W 20011226
- JP 2000398398 A 20001227
Abstract (en)
Separation circuit 250 separates a systematic bit and parity bit from a received packet. Combination circuit 204 symbol-combines the separated systematic bit in this retransmission unit with systematic bits acquired in preceding retransmission units. Then, decoder 214 likelihood-combines the separated parity bit with parity bits acquired in preceding retransmission units and performs error correcting decoding on the symbol-combined systematic bit using the likelihood-combined parity bit as a check bit. This makes it possible to increase the reception level and error correcting performance, reduce the number of times retransmission is carried out until all errors are eliminated and thereby improve throughput. <IMAGE>
IPC 1-7
IPC 8 full level
H04J 13/00 (2011.01); H04J 13/02 (2006.01); H04J 13/16 (2011.01); H04L 1/16 (2006.01); H04L 1/18 (2006.01); H04L 27/00 (2006.01); H04L 27/22 (2006.01); H04L 29/02 (2006.01); H04L 1/00 (2006.01)
CPC (source: EP KR US)
H04L 1/0066 (2013.01 - EP US); H04L 1/0068 (2013.01 - EP US); H04L 1/0071 (2013.01 - EP US); H04L 1/18 (2013.01 - KR); H04L 1/1819 (2013.01 - EP US); H04L 1/1845 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
US 2003014709 A1 20030116; CN 1406420 A 20030326; EP 1347593 A1 20030924; EP 1347593 A4 20060125; JP 2002198938 A 20020712; JP 3464649 B2 20031110; KR 20020079913 A 20021019; WO 02054659 A1 20020711
DOCDB simple family (application)
US 18253102 A 20020731; CN 01805683 A 20011226; EP 01272868 A 20011226; JP 0111448 W 20011226; JP 2000398398 A 20001227; KR 20027011144 A 20020826