EP 1397832 A2 20040317 - METHOD FOR ISOLATING SEMICONDUCTOR DEVICES
Title (en)
METHOD FOR ISOLATING SEMICONDUCTOR DEVICES
Title (de)
ISOLATIONSVERFAHREN FÜR HALBLEITERBAUELEMENTE
Title (fr)
PROCEDE D'ISOLATION DE DISPOSITIFS SEMI-CONDUCTEURS
Publication
Application
Priority
- US 0217864 W 20020607
- US 29697601 P 20010608
Abstract (en)
[origin: WO02101818A2] A method is disclosed for isolating device regions in a heterostructure that includes at least one layer of a strained semiconductor material. The method includes the steps of forming a trench in the at least one layer of strained semiconductor material using an etch chemistry that is selected to etch different layers of said heterostructure sufficiently similarly that said trench includes walls that are substantially straight, and depositing a dielectric material in the trench.
IPC 1-7
IPC 8 full level
H01L 21/762 (2006.01); H01L 29/165 (2006.01)
CPC (source: EP US)
H01L 21/76224 (2013.01 - EP US); H01L 29/165 (2013.01 - EP US)
Citation (search report)
See references of WO 02101818A2
Citation (examination)
- WO 0052749 A1 20000908 - APPLIED MATERIALS INC [US]
- US 4411734 A 19831025 - MAA JER-SHEN [US]
- CLARK S.E. ET AL: "DEPOSITION AND PATTERNING OF TUNGSTEN AND TANTALUM POLYCIDES", SOLID STATE TECHNOLOGY, vol. 27, no. 4, 1984, pages 235 - 242
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR
DOCDB simple family (publication)
WO 02101818 A2 20021219; WO 02101818 A3 20030410; AU 2002320060 A1 20021223; EP 1397832 A2 20040317; US 2003049893 A1 20030313
DOCDB simple family (application)
US 0217864 W 20020607; AU 2002320060 A 20020607; EP 02749559 A 20020607; US 16503102 A 20020607