Global Patent Index - EP 1425785 A2

EP 1425785 A2 20040609 - METHOD OF FABRICATING A GATE STACK AT LOW TEMPERATURE

Title (en)

METHOD OF FABRICATING A GATE STACK AT LOW TEMPERATURE

Title (de)

VERFAHREN ZUR HERSTELLUNG EINES MEHRSCHICHT-GATES BEI NIEDRIGER TEMPERATUR

Title (fr)

PROCEDE D'EMPILEMENT DE GRILLE A BASSE TEMPERATURE

Publication

EP 1425785 A2 20040609 (EN)

Application

EP 02798410 A 20020826

Priority

  • US 0227230 W 20020826
  • US 31656201 P 20010831

Abstract (en)

[origin: TW559916B] The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed (30). The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300 DEG C.

IPC 1-7

H01L 21/28

IPC 8 full level

H01L 21/28 (2006.01)

Citation (search report)

See references of WO 03041124A2

DOCDB simple family (publication)

EP 1425785 A2 20040609; TW 559916 B 20031101

DOCDB simple family (application)

EP 02798410 A 20020826; TW 91119485 A 20020828