EP 1428261 A1 20040616 - SEMICONDUCTOR MEMORY ELEMENT ARRANGEMENT
Title (en)
SEMICONDUCTOR MEMORY ELEMENT ARRANGEMENT
Title (de)
HALBLEITERSPEICHERELEMENTANORDNUNG
Title (fr)
ENSEMBLE D'ELEMENTS DE MEMOIRE A SEMI-CONDUCTEURS
Publication
Application
Priority
- DE 0202742 W 20020725
- DE 10146215 A 20010919
Abstract (en)
[origin: WO03028107A1] The invention relates to a method for producing a semiconductor memory element arrangement. According to said method, an isolating layer and a layer system consisting of a floating gate and a tunnel barrier arrangement applied to the floating gate are applied to a substrate. A first gate electrode is embodied next to the floating gate and a second gate electrode is embodied next to the tunnel barrier arrangement. Said gate electrodes are formed, in a first trench structure, of parallel first trenches, and in a second trench structure, of parallel second trenches which are perpendicular to the first trenches.
IPC 1-7
IPC 8 full level
H01L 21/8247 (2006.01); H10B 41/00 (2023.01); H10B 69/00 (2023.01)
CPC (source: EP US)
H10B 41/00 (2023.02 - EP US); H10B 69/00 (2023.02 - EP US)
Designated contracting state (EPC)
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LI LU MC NL PT SE SK TR
DOCDB simple family (publication)
WO 03028107 A1 20030403; DE 10146215 A1 20030410; EP 1428261 A1 20040616; US 2004252576 A1 20041216
DOCDB simple family (application)
DE 0202742 W 20020725; DE 10146215 A 20010919; EP 02754443 A 20020725; US 80567004 A 20040319