Global Patent Index - EP 1433065 A1

EP 1433065 A1 20040630 - METHOD AND DEVICE FOR OPTIMIZED CODE CHECKER

Title (en)

METHOD AND DEVICE FOR OPTIMIZED CODE CHECKER

Title (de)

VERFAHREN UND PRÜFSYSTEM MIT OPTIMIERTEM KODE

Title (fr)

PROCEDE ET DISPOSITIF DE VERIFICATEUR DE CODE OPTIMISE

Publication

EP 1433065 A1 20040630 (FR)

Application

EP 02783198 A 20020924

Priority

  • FR 0203249 W 20020924
  • FR 0112278 A 20010924

Abstract (en)

[origin: WO03027851A1] The verification process is applied to a programme (4) when it is being integrated into an electronic device (2), the programme being organized on the basis of types linked by parentage relationships, each type being identified by a respective code. The invention is characterized in that it comprises a phase which consists in carrying out unification of the types so as to determine their nearest common ancestor using a form of said code including a pattern of bits in accordance with a formalism which expresses the parentage of the type with which it is associated, and by performing a logical combination of the patterns assigned to the types to be unified, producing the pattern of the type which is their nearest common ancestor. The invention enables verification in devices with limited storage memory resources, in particular smart cards (2).

IPC 1-7

G06F 11/36

IPC 8 full level

G06F 11/36 (2006.01)

CPC (source: EP US)

G06F 11/3604 (2013.01 - EP US)

Citation (search report)

See references of WO 03027851A1

Designated contracting state (EPC)

AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LI LU MC NL PT SE SK TR

DOCDB simple family (publication)

WO 03027851 A1 20030403; CN 1589435 A 20050302; EP 1433065 A1 20040630; FR 2830095 A1 20030328; FR 2830095 B1 20031031; US 2005044542 A1 20050224

DOCDB simple family (application)

FR 0203249 W 20020924; CN 02823284 A 20020924; EP 02783198 A 20020924; FR 0112278 A 20010924; US 49041504 A 20041026