EP 1466191 A1 20041013 - METHOD OF COOLING HIGH DENSITY ELECTRONICS
Title (en)
METHOD OF COOLING HIGH DENSITY ELECTRONICS
Title (de)
VERFAHREN ZUM KÜHLEN HOCHDICHTER ELEKTRONIK
Title (fr)
PROCEDE DE REFROIDISSEMENT DE COMPOSANTS ELECTRONIQUES DE HAUTE DENSITE
Publication
Application
Priority
US 0143392 W 20011121
Abstract (en)
[origin: WO03046610A1] For nuclear imaging of a subject injected with a radioactive isotope, each detector array 18 is associated with event analyzer circuitry 64 and detector array signals due to gamma ray emissions indicative of nuclear decay are processed and reconstructed into an image of the subject anatomy. Cadmium zinc telluride CZT crystals 20 outputs are amplified by complex low-noise integrated preamplifier circuits P-ASIC 60 dissipating 300-500 mW each. Additionally, low-noise linear voltage regulators 66 providing regulated DC power to assure delivery of clean power to the P-ASIC 60, dissipate 150-250 mW each. In order to facilitate cooling of electrical components 60,66 which account for most of the dissipated power on circuit boards 62, the boards 62 are arranged parallel to each other and extend perpendicularly away from the detector array 18 to provide channels between the boards 62 through which cooling air is drawn by an array of fans.
[origin: WO03046610A1] For nuclear imaging of a subject injected with a radioactive isotope, each detector array (18) is associated with event analyzer circuitry (64) and detector array signals due to gamma ray emissions indicative of nuclear decay are processed and reconstructed into an image of the subject anatomy. Cadmium zinc telluride (CZT) crystals (20) outputs are amplified by complex low−noise integrated preamplifier circuits (P−ASIC 60) dissipating 300−500 mW each. Additionally, low−noise linear voltage regulators (66) providing regulated DC power to assure delivery of clean power to the P−ASIC (60), dissipate 150−250 mW each. In order to facilitate cooling of electrical components (60,66) which account for most of the dissipated power on circuit boards (62), the boards (62) are arranged parallel to each other and extend perpendicularly away from the detector array (18) to provide channels between the boards (62) through which cooling air is drawn by an array of fans.
IPC 1-7
IPC 8 full level
G01T 1/161 (2006.01); G01T 1/20 (2006.01); G01T 1/24 (2006.01); G01T 7/00 (2006.01); H01L 27/14 (2006.01); H01L 31/09 (2006.01); H05K 7/20 (2006.01)
CPC (source: EP US)
G01T 1/2006 (2013.01 - EP US)
Citation (search report)
See references of WO 03046610A1
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR
DOCDB simple family (publication)
WO 03046610 A1 20030605; EP 1466191 A1 20041013; JP 2005510741 A 20050421; JP 4429723 B2 20100310
DOCDB simple family (application)
US 0143392 W 20011121; EP 01273249 A 20011121; JP 2003547994 A 20011121