EP 1469604 B1 20090812 - TWO-MODULUS PRESCALER CIRCUIT
Title (en)
TWO-MODULUS PRESCALER CIRCUIT
Title (de)
MODULUS-ZWEI-VORSKALIERERSCHALTUNG
Title (fr)
CIRCUIT GENERATEUR D'ECHELLES A DEUX MODULES
Publication
Application
Priority
- JP 0213190 W 20021217
- JP 2001386873 A 20011220
Abstract (en)
[origin: EP1469604A1] In the dual modulus prescaler circuit, an output terminal of the first multi-input logic gate circuit is connected to a data input terminal of a first D flip-flop circuit; output terminals of the first to (n-2)thD flip-flop circuits are, respectively, connected to data input terminals of the second to (n-1)th D flip-flop circuits; output terminals of the (n-1)th and nth D flip-flop circuits are connected to input terminals of the first multi-input logic gate circuit; the second multi-input logic gate circuit is connected to the output terminal of the (n-1)th D flip-flop circuit and receives a switching signal; and an output terminal of the second multi-input logic gate circuit is connected to a data input terminal of the nth D flip-flop circuit. Moreover, all the aforementioned connections are connections using differential signals. <IMAGE>
IPC 8 full level
H03K 21/00 (2006.01); H03K 23/64 (2006.01); H03K 23/66 (2006.01)
CPC (source: EP US)
H03K 23/667 (2013.01 - EP US)
Citation (examination)
US 6265898 B1 20010724 - BELLAOUAR ABDELLATIF [US]
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 1469604 A1 20041020; EP 1469604 A4 20050202; EP 1469604 B1 20090812; DE 60233352 D1 20090924; JP 2003188716 A 20030704; JP 3857916 B2 20061213; US 2005116258 A1 20050602; WO 03058817 A1 20030717
DOCDB simple family (application)
EP 02786127 A 20021217; DE 60233352 T 20021217; JP 0213190 W 20021217; JP 2001386873 A 20011220; US 49964004 A 20040621