EP 1506616 A1 20050216 - ELECTRONIC CIRCUIT ARRANGEMENT FOR ERROR-FREE ANALOG/DIGITAL CONVERSION OF SIGNALS
Title (en)
ELECTRONIC CIRCUIT ARRANGEMENT FOR ERROR-FREE ANALOG/DIGITAL CONVERSION OF SIGNALS
Title (de)
ELEKTRONISCHE SCHALTUNGSANORDNUNG ZUR FEHLERABGESICHERTEN ANALOG-/DIGITAL-UMWANDLUNG VON SIGNALEN
Title (fr)
CIRCUIT ELECTRONIQUE DE CONVERSION ANALOGIQUE/NUMERIQUE DE SIGNAUX PROTEGEE CONTRE LES ERREURS
Publication
Application
Priority
- DE 10220762 A 20020508
- EP 0304805 W 20030508
Abstract (en)
[origin: WO03096540A1] The invention relates to a circuit arrangement for error-free analog/digital conversion of N analog input signals Ni in a plurality of digital output signals corresponding to the number N using an analog/digital converter (10), wherein N >= 1, N' other redundancy inputs N'i are provided, especially corresponding to the number N, and which are fed to said analog/digital converter (10). N and N' inputs are supplied to one or several analog multiplexer(s) (3, 4, 11, 12, 16) and the circuit arrangement is provided with an error monitoring functionality. Each input signal Ni is counter to the corresponding redundancy signal N'i. The invention also relates to the use of said circuit arrangement in electronic motor vehicle control devices provided with an antilock function. .
IPC 1-7
IPC 8 full level
CPC (source: EP US)
H03M 1/1071 (2013.01 - EP US); H03M 1/1225 (2013.01 - EP US)
Citation (search report)
See references of WO 03096540A1
Designated contracting state (EPC)
DE FR IT
DOCDB simple family (publication)
WO 03096540 A1 20031120; DE 10392545 A5 20130919; DE 10392545 B4 20180315; EP 1506616 A1 20050216; JP 2005525038 A 20050818; JP 4354906 B2 20091028; US 2005190088 A1 20050901; US 7135998 B2 20061114
DOCDB simple family (application)
EP 0304805 W 20030508; DE 10392545 T 20030508; EP 03727448 A 20030508; JP 2004504388 A 20030508; US 51381704 A 20041108