Global Patent Index - EP 1627490 A1

EP 1627490 A1 20060222 - PROCESSOR AND METHOD FOR END-TO-END ENCRYPTION SYNCHRONISATION

Title (en)

PROCESSOR AND METHOD FOR END-TO-END ENCRYPTION SYNCHRONISATION

Title (de)

PROZESSOR UND VERFAHREN FÜR END-TO-END-VERSCHLÜSSELUNGSSYNCHRONISATION

Title (fr)

PROCESSEUR ET PROCEDE DE SYNCHRONISATION DE CHIFFREMENT DE BOUT-EN-BOUT

Publication

EP 1627490 A1 20060222 (EN)

Application

EP 04727904 A 20040416

Priority

  • EP 2004050551 W 20040416
  • GB 0311571 A 20030519

Abstract (en)

[origin: GB2402024A] A processor for encrypting or decrypting information to be communicated from a first location to a second location, the processor being operable in at least two modes including (i) a first mode wherein information is encrypted by an encryption portion of a keystream and a synchronisation indicator is generated in association with each encryption portion and (ii) a second mode wherein information is encrypted by a plurality of encryption portions and a single synchronisation indicator is generated in association with each plurality of encryption portions.

IPC 1-7

H04L 9/12

IPC 8 full level

H04L 9/12 (2006.01)

CPC (source: EP KR)

H04L 9/0662 (2013.01 - EP); H04L 9/08 (2013.01 - KR); H04L 9/12 (2013.01 - EP KR); H04L 9/14 (2013.01 - KR); H04L 9/30 (2013.01 - KR)

Designated contracting state (EPC)

AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR

DOCDB simple family (publication)

GB 0311571 D0 20030625; GB 2402024 A 20041124; GB 2402024 B 20050713; AT E382219 T1 20080115; DE 602004010903 D1 20080207; DE 602004010903 T2 20080508; EP 1627490 A1 20060222; EP 1627490 B1 20071226; KR 20060003375 A 20060110; NO 20055411 D0 20051116; NO 20055411 L 20060208; WO 2004102872 A1 20041125

DOCDB simple family (application)

GB 0311571 A 20030519; AT 04727904 T 20040416; DE 602004010903 T 20040416; EP 04727904 A 20040416; EP 2004050551 W 20040416; KR 20057022100 A 20051118; NO 20055411 A 20051116