EP 1844381 A2 20071017 - STANDARD CMOS LOW-NOISE HIGH PSRR LOW DROP-OUT REGULATOR WITH NEW DYNAMIC COMPENSATION
Title (en)
STANDARD CMOS LOW-NOISE HIGH PSRR LOW DROP-OUT REGULATOR WITH NEW DYNAMIC COMPENSATION
Title (de)
RAUSCHARMER STANDARD-CMOS-REGLER MIT GERINGER ABFALLSPANNUNG, HOHER PSRR UND NEUER DYNAMISCHER KOMPENSATION
Title (fr)
REGULATEUR A FAIBLE DESEXCITATION, A PSRR ELEVE, A FAIBLE BRUIT, CMOS STANDARD AVEC COMPENSATION DYNAMIQUE NOUVELLE
Publication
Application
Priority
- US 2006000563 W 20060109
- FR 0500890 A 20050128
- US 11913005 A 20050429
Abstract (en)
[origin: WO2006083490A2] A voltage regulator circuit (200) has a first amplifier stage (210) with input and output terminals, a feedback terminal, a pole-inducing transistor, and a compensating network coupled to the output terminal. A second amplifier stage (220) has an input coupled to the first amplifier output, first and second current mirrors, and a pass transistor.
IPC 8 full level
G05F 1/40 (2006.01); G05F 1/44 (2006.01); G05F 1/56 (2006.01); G05F 1/565 (2006.01); G05F 1/618 (2006.01)
CPC (source: EP)
G05F 1/565 (2013.01); G05F 1/575 (2013.01)
Designated contracting state (EPC)
DE GB
Designated extension state (EPC)
AL BA HR MK YU
DOCDB simple family (publication)
WO 2006083490 A2 20060810; WO 2006083490 A3 20080320; EP 1844381 A2 20071017; EP 1844381 A4 20090225
DOCDB simple family (application)
US 2006000563 W 20060109; EP 06717728 A 20060109