Global Patent Index - EP 1847981 A1

EP 1847981 A1 2007-10-24 - Systems for displaying images involving reduced mura

Title (en)

Systems for displaying images involving reduced mura

Title (de)

Systeme zur Bildanzeige mit reduziertem Mura

Title (fr)

Systèmes d'affichage d'images ayant un mura réduit

Publication

EP 1847981 A1 (EN)

Application

EP 06008022 A

Priority

EP 06008022 A

Abstract (en)

Systems for displaying images are provided. A representative system incorporates a display device that includes a data line operative to provide display signals and sweep signals; a scan line operative to provide scan reset signals; a first capacitor having a first end coupled to the data line for storing charges from the signal line; a first inversion unit having an input end coupled to a second end of the first capacitor, a first supply end coupled to a first voltage source, a second supply end coupled to a second voltage source larger than the first voltage, and an output end; a first reset switch having a first end coupled between the second end of the first capacitor and the input end of the first inversion unit, a second end coupled to the output end of the first inversion unit, and a control end coupled to the scan line; a driving TFT having a control end coupled to the output end of the first inversion unit; and an illuminating unit coupled between a first end of the driving TFT and a third voltage source larger than or equal to the first voltage source.

IPC 8 full level (invention and additional information)

G09G 3/32 (2006.01)

CPC (invention and additional information)

G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0833 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0295 (2013.01)

Citation (search report)

  • [X] US 2002196213 A1 20021226 - AKIMOTO HAJIME [JP], et al
  • [XA] US 2003067424 A1 20030410 - AKIMOTO HAJIME [JP], et al
  • [X] EP 1439520 A2 20040721 - SANYO ELECTRIC CO [JP]
  • [A] US 2004196221 A1 20041007 - SHIH LI-WEI [TW]
  • [X] KAGEYAMA H ET AL: "A 3.5-INCH OLED DISLAY USING A 4-TFT PIXEL CIRCUIT WITH AN INNOVATIVE PIXEL DRIVING SCHEME", 2003 SID INTERNATIONAL SYMPOSIUM DIGEST OF TECHNICAL PAPERS. BALTIMORE, MD, MAY 20 - 22, 2003, SID INTERNATIONAL SYMPOSIUM DIGEST OF TECHNICAL PAPERS, SAN JOSE, CA : SID, US, vol. VOL. 34 / 1, 20 May 2003 (2003-05-20), pages 96 - 99, XP001171712

Designated contracting state (EPC)

DE FR GB IT NL

Designated extension state (EPC)

AL BA HR MK YU

EPO simple patent family

EP 1847981 A1 20071024

INPADOC legal status


2010-01-27 [18D] DEEMED TO BE WITHDRAWN

- Effective date: 20090716

2009-04-08 [17Q] FIRST EXAMINATION REPORT

- Effective date: 20090305

2008-07-02 [AKX] PAYMENT OF DESIGNATION FEES

- Designated State(s): DE FR GB IT NL

2008-06-04 [17P] REQUEST FOR EXAMINATION FILED

- Effective date: 20080423

2007-10-24 [AK] DESIGNATED CONTRACTING STATES:

- Kind Code of Ref Document: A1

- Designated State(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

2007-10-24 [AX] REQUEST FOR EXTENSION OF THE EUROPEAN PATENT TO

- Countries: AL BA HR MK YU