Global Patent Index - EP 1999781 A2

EP 1999781 A2 20081210 - DRY ETCH STOP PROCESS FOR ELIMINATING ELECTRICAL SHORTING IN MRAM DEVICE STRUCTURES

Title (en)

DRY ETCH STOP PROCESS FOR ELIMINATING ELECTRICAL SHORTING IN MRAM DEVICE STRUCTURES

Title (de)

TROCKENÄTZVERFAHREN ZUR BESEITIGUNG ELEKTRISCHER KURZSCHLÜSSE BEI MRAM-GERÄTESTRUKTUREN

Title (fr)

PROCEDE D'ARRET DE GRAVURE A SEC POUR ELIMINER UN COURT-CIRCUIT ELECTRIQUE DANS DES STRUCTURES DE DISPOSITIF MRAM

Publication

EP 1999781 A2 20081210 (EN)

Application

EP 07753250 A 20070316

Priority

  • US 2007006607 W 20070316
  • US 78315706 P 20060316
  • US 72455607 A 20070314

Abstract (en)

[origin: WO2007109117A2] The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.

IPC 8 full level

H01L 21/00 (2006.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01)

CPC (source: EP KR)

H10N 50/01 (2023.02 - EP KR); H10N 52/00 (2023.02 - KR)

Designated contracting state (EPC)

AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR

DOCDB simple family (publication)

WO 2007109117 A2 20070927; WO 2007109117 A3 20071213; EP 1999781 A2 20081210; JP 2009530825 A 20090827; JP 5085637 B2 20121128; KR 20090008240 A 20090121

DOCDB simple family (application)

US 2007006607 W 20070316; EP 07753250 A 20070316; JP 2009500499 A 20070316; KR 20087025349 A 20081016