EP 2062144 A1 20090527 - ARRANGEMENT WITH INSTRUCTION CACHE
Title (en)
ARRANGEMENT WITH INSTRUCTION CACHE
Title (de)
ANORDNUNG MIT ANWEISUNGS-CACHE
Title (fr)
DISPOSITIF PRÉSENTANT UNE ANTÉMÉMOIRE D'INSTRUCTIONS
Publication
Application
Priority
- NL 2007050440 W 20070907
- EP 06118710 A 20060914
- EP 07793884 A 20070907
Abstract (en)
[origin: EP1901169A1] Method of executing a program by a processor (1). The processor (1) retrieves blocks of data from a cache (5) or a memory (3). When the processor (1) executes a jump instruction which identifies a specific address in the cache (5) to retrieve a first block of data from, it is checked in the cache (5) whether the first block of data is stored in the cache (5). If so, the first block of data is retrieved from said cache (5) to be executed by the processor (1). Immediately, a pre-fetch action is started to read a second block of data from said memory (3) which is associated with a next instruction to be executed by said processor (1).
IPC 8 full level
G06F 12/08 (2006.01); G06F 12/0862 (2016.01)
CPC (source: EP)
G06F 12/0862 (2013.01); G06F 2212/6028 (2013.01)
Citation (search report)
See references of WO 2008033020A1
Designated contracting state (EPC)
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR
Designated extension state (EPC)
AL BA HR MK RS
DOCDB simple family (publication)
EP 1901169 A1 20080319; EP 2062144 A1 20090527; EP 2062144 B1 20131009; WO 2008033020 A1 20080320
DOCDB simple family (application)
EP 06118710 A 20060914; EP 07793884 A 20070907; NL 2007050440 W 20070907