Title (en)

Plating jig and plating method for electronic component by using the same

Title (de)

Plattierungsvorrichtung und Plattierungsverfahren für ein elektronisches Bauelement durch Verwenden davon

Title (fr)

Gabarit de placage et procédé de placage pour composant électronique en utilisant ce dernier

Publication

EP 2096195 A2 20090902 (EN)

Application

EP 09153477 A 20090223

Priority

JP 2008041258 A 20080222

Abstract (en)

The resilient member 30 and the polyhedral member 40 are accommodated in a mutually adjacent manner in the recessed hole 22 formed at least in one on the surface of the electrode pad 20, the cover body 50 for preventing the resilient member 30 and the polyhedral member 40 from departing from the recessed hole 22 is disposed in such an arrangement as to cover the surface of the electrode pad 20, the opening port 52 for advancement of the lead wire 64 is formed at a position corresponding to the recessed hole 22 on the cover body 50, and the lead wire 64 of an electronic component is allowed to advance between the inner wall face of the recessed hole and the wall face of the polyhedral member 40 from the opening port 52 against the resilient force of the resilient member 30 and the lead wire 64 is held between the wall face of the polyhedral member 40 and the inner wall face of the recessed hole 22, thereby retaining the electronic component.

IPC 8 full level

C25D 17/08 (2006.01)

CPC (source: EP)

C25D 17/08 (2013.01)

Citation (applicant)

• JP 2006183109 A 20060713 - SHINKO ELECTRIC IND CO
• JP 3620531 B2 20050216

Designated contracting state (EPC)

AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK TR

Designated extension state (EPC)

AL BA RS

DOCDB simple family (publication)

EP 2096195 A2 20090902; CN 101514476 A 20090826; JP 2009197283 A 20090903; SG 155138 A1 20090930

DOCDB simple family (application)

EP 09153477 A 20090223; CN 200910005381 A 20090220; JP 2008041258 A 20080222; SG 2009011545 A 20090218