Global Patent Index - EP 2141797 A1

EP 2141797 A1 20100106 - Circuit with a time to digital converter and phase measuring method

Title (en)

Circuit with a time to digital converter and phase measuring method

Title (de)

Schaltung mit einem Zeit-Digital-Wandler und Phasenmessungsverfahren

Title (fr)

Circuit avec convertisseur numérique et procédé de mesure de phase

Publication

EP 2141797 A1 20100106 (EN)

Application

EP 08159474 A 20080702

Priority

EP 08159474 A 20080702

Abstract (en)

Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit (20) of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit (22) with a delay circuit input and a plurality of taps outputs respective, differently delayed versions of a signal from a delay circuit input. A sampling register (24) has data inputs coupled to the taps, and samples data from the data inputs in response to an active transition at a clock input. When in the normal operating mode, the feed circuit (2) feeds an oscillator signal of an oscillator circuit (10) to the delay circuit input and a reference signal to the clock input of the sampling register (24). When in the calibration mode, the feed circuit (20) supplies signals with transitions having timing controlled by the oscillator signal to both the delay circuit input and the clock input. The feed circuit (20) provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit (28) switches the feed circuit between the normal operating mode and the calibration mode, and controls the feed circuit (20) successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register (24) for each selection and determine calibration data for the oscillator signal from said data.

IPC 8 full level

H03D 13/00 (2006.01); H03L 7/091 (2006.01)

CPC (source: EP US)

H03L 7/085 (2013.01 - EP US); H03L 7/091 (2013.01 - EP US)

Citation (applicant)

US 6429693 B1 20020806 - STASZEWSKI ROBERT B [US], et al

Citation (search report)

Designated contracting state (EPC)

AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TR

Designated extension state (EPC)

AL BA MK RS

DOCDB simple family (publication)

EP 2141797 A1 20100106; CN 102113206 A 20110629; CN 102113206 B 20140625; EP 2301145 A1 20110330; EP 2301145 B1 20140402; JP 2011526752 A 20111013; JP 5437366 B2 20140312; US 2012019296 A1 20120126; US 8362932 B2 20130129; WO 2010000746 A1 20100107

DOCDB simple family (application)

EP 08159474 A 20080702; CN 200980130102 A 20090630; EP 09772446 A 20090630; EP 2009058201 W 20090630; JP 2011515436 A 20090630; US 200913000732 A 20090630