EP 2252998 A1 20101124 - METHODS FOR MAKING A STACK OF MEMORY CIRCUITS AND FOR ADDRESSING A MEMORY CIRCUIT, AND CORRESPONDING STACK AND DEVICE
Title (en)
METHODS FOR MAKING A STACK OF MEMORY CIRCUITS AND FOR ADDRESSING A MEMORY CIRCUIT, AND CORRESPONDING STACK AND DEVICE
Title (de)
VERFAHREN ZUR HERSTELLUNG EINES STAPELS VON SPEICHERSCHALTUNGEN UND ZUR ADRESSIERUNG EINER SPEICHERSCHALTUNG SOWIE ENTSPRECHENDER STAPEL UND ENTSPRECHENDES GERÄT
Title (fr)
PROCEDES POUR FABRIQUER UN EMPILEMENT DE CIRCUITS MEMOIRE ET POUR ADRESSER UN CIRCUIT MEMOIRE, EMPILEMENT ET DISPOSITIF CORRESPONDANTS
Publication
Application
Priority
- EP 2009052121 W 20090223
- EP 08305050 A 20080307
- EP 09720524 A 20090223
Abstract (en)
[origin: EP2099031A1] The method involves carrying out validity check of memory circuits (20A-20H) within a memory circuit stack (20), and carrying out a phase configuration on each memory circuit. The phase configuration is carried out by writing information relative to an identifier attributed to each memory circuit and information relative to the validity check result, within a configuration device of each memory circuit within the stack. The memory circuits are issued from two different wafers, where each wafer includes two memory circuits. Independent claims are also included for the following: (1) a method for addressing a memory circuit within a memory circuit stack (2) a memory circuit stack comprising two memory circuits.
IPC 8 full level
G11C 29/00 (2006.01); G06F 12/06 (2006.01); G11C 5/00 (2006.01); G11C 8/12 (2006.01); G11C 29/44 (2006.01); H10B 69/00 (2023.01)
CPC (source: EP US)
G11C 5/02 (2013.01 - EP US); G11C 5/063 (2013.01 - EP US); G11C 29/44 (2013.01 - EP US); G11C 29/88 (2013.01 - EP US); H01L 25/0657 (2013.01 - EP US); H01L 25/50 (2013.01 - EP US); H01L 2224/05573 (2013.01 - EP US); H01L 2224/13025 (2013.01 - EP US); H01L 2224/16 (2013.01 - EP US); H01L 2225/06513 (2013.01 - EP US); H01L 2225/06596 (2013.01 - EP US); H01L 2924/00014 (2013.01 - EP US); Y10T 29/49004 (2015.01 - EP US); Y10T 29/49126 (2015.01 - EP US)
C-Set (source: EP US)
Designated contracting state (EPC)
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK TR
Designated extension state (EPC)
AL BA RS
DOCDB simple family (publication)
EP 2099031 A1 20090909; CN 101971265 A 20110209; CN 101971265 B 20140820; EP 2252998 A1 20101124; JP 2011517360 A 20110602; JP 5247827 B2 20130724; KR 101244602 B1 20130325; KR 20100126483 A 20101201; US 2011002153 A1 20110106; US 8441830 B2 20130514; WO 2009112354 A1 20090917
DOCDB simple family (application)
EP 08305050 A 20080307; CN 200980107973 A 20090223; EP 09720524 A 20090223; EP 2009052121 W 20090223; JP 2010549087 A 20090223; KR 20107022476 A 20090223; US 91979909 A 20090223