EP 2256721 A4 20120704 - DISPLAY PANEL DRIVING CIRCUIT, LIQUID CRYSTAL DISPLAY DEVICE, SHIFT REGISTER, LIQUID CRYSTAL PANEL, AND DISPLAY DEVICE DRIVING METHOD
Title (en)
DISPLAY PANEL DRIVING CIRCUIT, LIQUID CRYSTAL DISPLAY DEVICE, SHIFT REGISTER, LIQUID CRYSTAL PANEL, AND DISPLAY DEVICE DRIVING METHOD
Title (de)
ANZEIGESCHIRM-ANSTEUERSCHALTUNG, FLÜSSIGKRISTALLANZEIGEANORDNUNG, SCHIEBEREGISTER, FLÜSSIGKRISTALLSCHIRM UND ANZEIGEANORDNUNGS-ANSTEUERVERFAHREN
Title (fr)
CIRCUIT DE COMMANDE DE PANNEAU D'AFFICHAGE, DISPOSITIF D'AFFICHAGE À CRISTAUX LIQUIDES, REGISTRE DE DÉCALAGE, PANNEAU À CRISTAUX LIQUIDES ET PROCÉDÉ DE COMMANDE DE DISPOSITIF D'AFFICHAGE
Publication
Application
Priority
- JP 2008072931 W 20081217
- JP 2008072420 A 20080319
Abstract (en)
[origin: EP2256721A1] A display panel drive circuit includes a shift register (10a) constructed of unit circuits (SC1 to SCm) connected in stages. The unit circuits generate signal line selection signals (G1 to Gm), respectively, which signal line selection signals are made active for a respective certain period of time to form a respective pulse, and the pulses are outputted successively from respective unit circuits in order of ordinal number starting from a first stage until an end stage. Each of the unit circuits receive (i) clock signals (CK1 and CK2) generated based on a sync signal received from outside of the display panel drive circuit, (ii) a start pulse signal (GSP) generated based on the sync signal, or a signal line selection signal generated in a stage different from its own stage, and (iii) a clear signal (CLR). The clear signal (CLR) is made active in a case where anomalousness is included in the sync signal, and no pulse is outputted from the shift register (10a) until a subsequent vertical scanning period starts. This configuration achieves a display panel drive circuit which prevents display disorder or holds down increase in load given to a power source, each of which occurs in a case where anomalousness is included in the sync signal (VSYNC, HSYNC, or DE).
IPC 8 full level
G09G 3/36 (2006.01); G02F 1/133 (2006.01); G09G 3/20 (2006.01); G11C 19/18 (2006.01)
CPC (source: EP US)
G09G 3/3677 (2013.01 - EP US); G11C 19/184 (2013.01 - EP US); G11C 19/28 (2013.01 - EP US); G09G 2310/0286 (2013.01 - EP US); G09G 2330/025 (2013.01 - EP US)
Citation (search report)
- [I] US 2006071891 A1 20060406 - ANAI KIMIO [JP]
- [XAI] TW 200813922 A 20080316 - AU OPTRONICS CORP [TW] & US 2008079682 A1 20080403 - CHANG LEE-HSUN [TW], et al
- [XA] KR 20080000041 A 20080102 - LG PHILIPS LCD CO LTD [KR] & US 2008122774 A1 20080529 - JO SUNG HAK [KR], et al
- [A] JP 2001134244 A 20010518 - TOSHIBA CORP
- [A] US 2006082534 A1 20060420 - HONDA KENKO [JP], et al
- [A] EP 0801376 A2 19971015 - THOMSON MULTIMEDIA SA [FR]
- [A] US 2007040792 A1 20070222 - KWAG JIN-OH [KR], et al
- [A] WILLEM DEN BOER: "Active Matrix Liquid Crystal Displays: Fundamentals and Applications", 2005, NEWNES, U.S.A., ISBN: 0750678135, article "AMLCD Electronics", pages: 87 - 111, XP002676121
- See references of WO 2009116214A1
Designated contracting state (EPC)
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TR
DOCDB simple family (publication)
EP 2256721 A1 20101201; EP 2256721 A4 20120704; BR PI0822355 A2 20150616; CN 101971242 A 20110209; CN 101971242 B 20130410; JP 5318852 B2 20131016; JP WO2009116214 A1 20110721; RU 2010140797 A 20120427; RU 2455707 C2 20120710; US 2011018845 A1 20110127; US 8952880 B2 20150210; WO 2009116214 A1 20090924
DOCDB simple family (application)
EP 08873495 A 20081217; BR PI0822355 A 20081217; CN 200880128102 A 20081217; JP 2008072931 W 20081217; JP 2010503747 A 20081217; RU 2010140797 A 20081217; US 73612108 A 20081217