EP 2421132 A2 20120222 - Charge pump with a plurality of transfer control switches
Title (en)
Charge pump with a plurality of transfer control switches
Title (de)
Ladungspumpe mit einem Mehrzahl von Übertragungssteuerschaltern
Title (fr)
Pompe de charge avec une pluralité de commutateurs de commende de transferte
Publication
Application
Priority
- EP 09798318 A 20090717
- US 13527908 P 20080718
Abstract (en)
A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an "active bias resistor" circuit that conducts between output terminals only during portions of a waveform appearing between the terminals, and/or wherein the bias voltage is generated by switching a small capacitance at cycles of said waveform. A threshold voltage bias voltage generation circuit may A charge pump for the bias generation may include a regulating feedback loop including an OTA that is also suitable for other uses, the OTA having a ratio-control input that controls a current mirror ratio in a differential amplifier over a continuous range, and optionally has differential outputs including an inverting output produced by a second differential amplifier that optionally includes a variable ratio current mirror controlled by the same ratio-control input. The ratio-control input may therefore control a common mode voltage of the differential outputs of the OTA. A control loop around the OTA may be configured to control the ratio of one or more variable ratio current mirrors, which may particularly control the output common mode voltage, and may control it such that the inverting output level tracks the non-inverting output level to cause the amplifier to function as a high-gain integrator.
IPC 8 full level
H02M 3/07 (2006.01)
CPC (source: EP US)
H02M 3/07 (2013.01 - EP US); H03F 1/26 (2013.01 - EP US); H03F 3/45183 (2013.01 - EP US); H03F 3/45237 (2013.01 - EP US); H03F 3/45475 (2013.01 - EP US); H03F 3/45659 (2013.01 - EP US); H03H 11/245 (2013.01 - EP US); H03K 17/145 (2013.01 - EP US); H03F 2200/453 (2013.01 - EP US); H03F 2200/456 (2013.01 - EP US); H03F 2200/474 (2013.01 - EP US); H03F 2203/45138 (2013.01 - EP US); H03F 2203/45188 (2013.01 - EP US); H03F 2203/45366 (2013.01 - EP US); H03F 2203/45418 (2013.01 - EP US); H03F 2203/45424 (2013.01 - EP US); H03F 2203/45471 (2013.01 - EP US); H03F 2203/45642 (2013.01 - EP US)
Designated contracting state (EPC)
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR
Designated extension state (EPC)
AL BA RS
DOCDB simple family (publication)
WO 2010008586 A2 20100121; WO 2010008586 A3 20110505; WO 2010008586 A4 20110707; EP 2311184 A2 20110420; EP 2311184 A4 20140226; EP 2330735 A2 20110608; EP 2330735 A3 20120404; EP 2346169 A2 20110720; EP 2346169 A3 20131120; EP 2385616 A2 20111109; EP 2421132 A2 20120222; JP 2011528870 A 20111124; US 2011156819 A1 20110630; US 8994452 B2 20150331
DOCDB simple family (application)
US 2009004149 W 20090717; EP 09798318 A 20090717; EP 11154275 A 20090717; EP 11154276 A 20090717; EP 11154277 A 20090717; EP 11154279 A 20090717; JP 2011518737 A 20090717; US 200913054781 A 20090717