Global Patent Index - EP 2452546 A1

EP 2452546 A1 20120516 - METHOD FOR PRODUCING A PRINTED CIRCUIT BOARD CONSISTING OF AT LEAST TWO PRINTED CIRCUIT BOARD REGIONS, AND PRINTED CIRCUIT BOARD

Title (en)

METHOD FOR PRODUCING A PRINTED CIRCUIT BOARD CONSISTING OF AT LEAST TWO PRINTED CIRCUIT BOARD REGIONS, AND PRINTED CIRCUIT BOARD

Title (de)

VERFAHREN ZUM HERSTELLEN EINER AUS WENIGSTENS ZWEI LEITERPLATTENBREICHEN BESTEHENDEN LEITERPLATTE SOWIE LEITERPLATTE

Title (fr)

PROCÉDÉ DE FABRICATION D'UNE CARTE DE CIRCUITS IMPRIMÉS CONSTITUÉE D'AU MOINS DEUX RÉGIONS AINSI QUE CARTE DE CIRCUITS IMPRIMÉS

Publication

EP 2452546 A1 20120516 (DE)

Application

EP 10743002 A 20100709

Priority

  • AT 2010000254 W 20100709
  • AT 4322009 U 20090710

Abstract (en)

[origin: WO2011003123A1] In a method for producing a printed circuit board consisting of at least two printed circuit board regions, wherein the printed circuit board regions each comprise at least one conductive layer and/or at least one device or one conductive component, wherein printed circuit board regions (20, 21, 22) to be connected to one another, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions (20, 21, 22) to be connected to one another, at least one additional layer or ply of the printed circuit board is arranged or applied over the printed circuit board regions (20, 21, 22) to be connected to one another, it is provided that the additional layer is embodied as a conductive layer (26), which is contact-connected via plated-through holes (23) to conductive layers or devices or components integrated in the printed circuit board regions (20, 21, 22) to be connected to one another, as a result of which a simple and reliable connection or coupling of printed circuit board regions (20, 21, 22) to be connected to one another can be made available. Furthermore, a printed circuit board consisting of a plurality of printed circuit board regions (20, 21, 22) is made available.

IPC 8 full level

H05K 1/14 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H05K 3/36 (2006.01); H05K 5/00 (2006.01)

CPC (source: EP KR US)

H05K 1/115 (2013.01 - US); H05K 1/14 (2013.01 - KR); H05K 1/142 (2013.01 - EP US); H05K 1/18 (2013.01 - KR); H05K 1/185 (2013.01 - EP US); H05K 1/189 (2013.01 - US); H05K 3/36 (2013.01 - KR); H05K 3/368 (2013.01 - EP US); H05K 3/46 (2013.01 - KR); H05K 3/4691 (2013.01 - EP US); H05K 3/4694 (2013.01 - EP US); H05K 3/225 (2013.01 - EP US); H05K 2201/0187 (2013.01 - EP US); H05K 2201/09163 (2013.01 - EP US); H05K 2201/09845 (2013.01 - EP US); H05K 2203/1461 (2013.01 - EP US); Y10T 29/49155 (2015.01 - EP US)

Citation (search report)

See references of WO 2011003123A1

Citation (examination)

Designated contracting state (EPC)

AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

DOCDB simple family (publication)

WO 2011003123 A1 20110113; AT 12319 U1 20120315; AT 13230 U1 20130815; CA 2802112 A1 20110113; CN 102474984 A 20120523; CN 102474984 B 20160106; CN 201667759 U 20101208; EP 2452546 A1 20120516; JP 2012532465 A 20121213; KR 20120032514 A 20120405; US 2012275124 A1 20121101; US 2017042028 A1 20170209; US 9491862 B2 20161108; US 9980380 B2 20180522

DOCDB simple family (application)

AT 2010000254 W 20100709; AT 2102010 U 20100330; AT 4322009 U 20090710; CA 2802112 A 20100709; CN 201020117034 U 20100209; CN 201080030936 A 20100709; EP 10743002 A 20100709; JP 2012518692 A 20100709; KR 20127000332 A 20100709; US 201013383237 A 20100709; US 201615331987 A 20161024