Global Patent Index - EP 2518899 A3

EP 2518899 A3 20130612 - Single-trigger low-energy flip-flop circuit

Title (en)

Single-trigger low-energy flip-flop circuit

Title (de)

Niederstrom-Flip-Flop-Schaltkreis mit einfachem Auslöser

Title (fr)

Circuit de bascule à faible énergie simple déclencheur

Publication

EP 2518899 A3 20130612 (EN)

Application

EP 12165817 A 20120426

Priority

US 201113095641 A 20110427

Abstract (en)

[origin: EP2518899A2] One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a single-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The single-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. The output signal Q is set or reset at the rising clock edge using a single- trigger subcircuit. A set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock.

IPC 8 full level

H03K 3/356 (2006.01); H03K 3/012 (2006.01)

CPC (source: EP US)

H03K 3/012 (2013.01 - EP); H03K 3/286 (2013.01 - US); H03K 3/356139 (2013.01 - EP); H03K 3/356191 (2013.01 - EP)

Citation (search report)

Designated contracting state (EPC)

AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

Designated extension state (EPC)

BA ME

DOCDB simple family (publication)

EP 2518899 A2 20121031; EP 2518899 A3 20130612; EP 2518899 B1 20170705; KR 101394873 B1 20140513; KR 20120121866 A 20121106; US 2012274377 A1 20121101; US 2013214839 A1 20130822; US 8436669 B2 20130507; US 8786345 B2 20140722

DOCDB simple family (application)

EP 12165817 A 20120426; KR 20120044965 A 20120427; US 201113095641 A 20110427; US 201313852987 A 20130328