EP 2550598 A1 20130130 - REDUNDANT TWO-PROCESSOR CONTROLLER AND CONTROL METHOD
Title (en)
REDUNDANT TWO-PROCESSOR CONTROLLER AND CONTROL METHOD
Title (de)
REDUNDANTE ZWEI-PROZESSOR-STEUERUNG UND STEUERUNGSVERFAHREN
Title (fr)
COMMANDE À DEUX PROCESSEURS REDONDANTE ET PROCÉDÉ DE COMMANDE
Publication
Application
Priority
- DE 102010003161 A 20100323
- EP 2011054143 W 20110318
Abstract (en)
[origin: WO2011117155A1] A redundant two-processor control device is proposed. The control device comprises a first processor (1) and a second processor (1) for the synchronous execution of a control program; at least one first multiplexer (70, 91) for the selective connection of at least one first peripheral unit (72, 95) that is to be controlled to one of the two processors (1, 2); at least one first comparison unit (70, 91) for monitoring the synchronization state of the two processors (1, 2) and for identifying a synchronization error when the two processors (1, 2) are out of sync; and a restoration control unit (44) which is set up to monitor the execution of at least one test program by the two processors (1, 2) following the occurrence of a synchronization error and to assess the test results and which is set up to configure at least the first multiplexer (70, 91).
IPC 8 full level
G06F 11/16 (2006.01)
CPC (source: EP US)
G06F 11/165 (2013.01 - EP US); G06F 11/1641 (2013.01 - EP US); G06F 11/1645 (2013.01 - EP US)
Citation (search report)
See references of WO 2011117155A1
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
DOCDB simple family (publication)
WO 2011117155 A1 20110929; EP 2550598 A1 20130130; US 2013007513 A1 20130103; US 8959392 B2 20150217
DOCDB simple family (application)
EP 2011054143 W 20110318; EP 11711799 A 20110318; US 201113636070 A 20110318