EP 2592756 A1 20130515 - Analog-to-digital converter
Title (en)
Analog-to-digital converter
Title (de)
Analog-Digitalumsetzer
Title (fr)
Convertisseur analogique-numérique
Publication
Application
Priority
EP 11189057 A 20111114
Abstract (en)
A continuous-time £”-ADC (1) is disclosed. It comprises a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ”£-ADC (1) at sample instants nT, where n is an integer sequence index and T is a sampling period, based on an analog input signal to the quantizer (5). Furthermore, the ”£-ADC (1) comprises one or more DACs (10a-b), each arranged to generate an analog feedback signal based on the samples of the digital output signal generated by the sampled quantizer (5). Moreover, the ”£-ADC (1) comprises a continuous-time analog network (20) arranged to generate the analog input signal to the quantizer (5) based on the feedback signal(s) from the one or more DACs (10a-b) and an analog input signal to the ”£-ADC (1). At least one DAC (10b) of the one or more DACs (10b) comprises two switched-capacitor DACs (40, 50) arranged to operate on the same input but with a mutual delay in time. A corresponding radio receiver circuit (100), a corresponding integrated circuit (200), and a corresponding radio communication apparatus (300, 400) are also disclosed.
IPC 8 full level
H03M 3/02 (2006.01)
CPC (source: EP US)
H03M 3/374 (2013.01 - EP US); H03M 3/396 (2013.01 - US); H03M 3/436 (2013.01 - US); H03M 3/458 (2013.01 - US); H03M 3/464 (2013.01 - EP US); H04B 1/16 (2013.01 - US); H04W 88/02 (2013.01 - US); H04W 88/08 (2013.01 - US); H03M 3/454 (2013.01 - EP US)
Citation (search report)
- [A] WO 2008071791 A1 20080619 - ERICSSON TELEFON AB L M [SE], et al
- [A] WO 2006067382 A1 20060629 - UNIV WESTMINSTER [GB], et al
- [XI] JUN-GI JO ET AL: "A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter Immunity Improved Full Clock Period SCR (FSCR) DAC and High-Speed DWA", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 46, no. 11, 1 November 2011 (2011-11-01), pages 2469 - 2477, XP011358215, ISSN: 0018-9200, DOI: 10.1109/JSSC.2011.2164296
- [A] LUCIEN J BREEMS ET AL: "A 56 mW Continuous-Time Quadrature Cascaded Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 42, no. 12, 1 December 2007 (2007-12-01), pages 2696 - 2705, XP011197036, ISSN: 0018-9200, DOI: 10.1109/JSSC.2007.908765
- [A] SANCHEZ-SINENCIO E ET AL: "A Continuous-Time>tex<$Sigma Delta $>/tex<Modulator With 88-dB Dynamic Range and 1.1-MHz Signal Bandwidth", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 39, no. 1, 1 January 2004 (2004-01-01), pages 75 - 86, XP011105690, ISSN: 0018-9200, DOI: 10.1109/JSSC.2003.820856
- [A] YANG JIANG ET AL: "A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators", ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS), 2010 17TH IEEE INTERNATIONAL CONFERENCE ON, IEEE, 12 December 2010 (2010-12-12), pages 547 - 550, XP031923019, ISBN: 978-1-4244-8155-2, DOI: 10.1109/ICECS.2010.5724570
- [XP] DEJAN RADJEN ET AL: "A continuous time modulator with reduced clock jitter sensitivity through DSCR feedback", NORCHIP, 2011, IEEE, 14 November 2011 (2011-11-14), pages 1 - 4, XP032092354, ISBN: 978-1-4577-0514-4, DOI: 10.1109/NORCHP.2011.6126701
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
EP 2592756 A1 20130515; EP 2592756 B1 20140507; CN 104067522 A 20140924; CN 104067522 B 20160120; US 2015065198 A1 20150305; US 9407282 B2 20160802; WO 2013074010 A1 20130523
DOCDB simple family (application)
EP 11189057 A 20111114; CN 201280056061 A 20121011; SE 2012000155 W 20121011; US 201214357786 A 20121011