EP 2843429 A1 20150304 - Enabling secured debug of an integrated circuit
Title (en)
Enabling secured debug of an integrated circuit
Title (de)
Ermöglichung der sicheren Störungsbeseitigung einer integrierten Schaltung
Title (fr)
Activation d'un débogage sécurisée d'un circuit intégré
Publication
Application
Priority
EP 13182739 A 20130903
Abstract (en)
The disclosed invention enables secured debug of an integrated circuit (300) which has a test operation mode and a secure mission operation mode. The integrated circuit has a processing unit (340), a test interface (312) through which the test operation mode is controllable, an on-chip memory (350) which is accessible in the test operation mode and in the secure mission operation mode, and one or more protected resources (360, 364, 370) which are inaccessible in the test operation mode. The processing unit is configured, in the test operation mode, to receive (401) an authenticated object (401) through the test interface, and store (401) the received authenticated object in the on-chip memory. The processing unit is moreover configured, upon reset into the secure mission operation mode, to execute a boot procedure (362) to determine (501) that the authenticated object is available in the on-chip memory, authenticate (502) the authenticated object, and - upon successful authentication - render (503a, 503b) the more protected resources accessible to a debug host (310) external to the integrated circuit.
IPC 8 full level
G01R 31/317 (2006.01); G01R 31/3185 (2006.01)
CPC (source: EP US)
B01J 8/0015 (2013.01 - US); F16K 3/02 (2013.01 - US); F16K 25/04 (2013.01 - US); F16K 27/044 (2013.01 - US); G01R 31/31719 (2013.01 - EP US); G01R 31/318588 (2013.01 - EP US); B01J 2208/00548 (2013.01 - US); B01J 2208/00787 (2013.01 - US)
Citation (search report)
- [A] US 2006282734 A1 20061214 - MILNE GEORGE J [GB], et al
- [A] US 2010088760 A1 20100408 - GREB KARL F [US], et al
- [A] US 7228440 B1 20070605 - GILES CHRISTOPHER M [US], et al
- [A] ASHKENAZI ET AL: "Platform independent overall security architecture in multi-processor system-on-chip integrated circuits for use in mobile phones and handheld devices", COMPUTERS & ELECTRICAL ENGINEERING, XX, XX, vol. 33, no. 5-6, 1 September 2007 (2007-09-01), pages 407 - 424, XP022241396, ISSN: 0045-7906, DOI: 10.1016/J.COMPELECENG.2007.05.003
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
EP 2843429 A1 20150304; EP 2843429 B1 20161123; BR 112016004606 B1 20210112; JP 2016535906 A 20161117; JP 6235722 B2 20171122; US 2017089477 A1 20170330; US 9939074 B2 20180410; WO 2015032571 A1 20150312
DOCDB simple family (application)
EP 13182739 A 20130903; BR 112016004606 A 20140806; EP 2014066918 W 20140806; JP 2016539449 A 20140806; US 201414913615 A 20140806