EP 2911056 A4 20160928 - METHOD FOR REDUCING CONSUMPTION OF MEMORY SYSTEM AND MEMORY CONTROLLER
Title (en)
METHOD FOR REDUCING CONSUMPTION OF MEMORY SYSTEM AND MEMORY CONTROLLER
Title (de)
VERFAHREN ZUR EINSCHRÄNKUNG DES VERBRAUCHS EINES SPEICHERSYSTEMS UND SPEICHERSTEUERUNG
Title (fr)
PROCÉDÉ DE RÉDUCTION DE CONSOMMATION DE SYSTÈME DE MÉMOIRE ET CONTRÔLEUR DE MÉMOIRE
Publication
Application
Priority
CN 2012083062 W 20121017
Abstract (en)
[origin: EP2911056A1] Embodiments of the present invention provide a method for reducing power consumption of a memory system and a memory controller. The method for reducing power consumption of a memory system includes: determining whether a dynamic random access memory DRAM memory module with a low access frequency exists in a memory system; when a DRAM memory module with a low access frequency exists, transfer, according to a size of a working set in the memory system, page data that does not belong to the working set to a non-volatile memory NVM memory module, where the page data that does not belong to the working set is page data that does not need to be accessed when a process runs within preset time. According to the embodiments of the present invention, the page data other than the working set is transferred to the NVM memory module, and because the NVM memory module has characteristics of non-volatility and low-power consumption, transferring a part of data in the DRAM memory module to the NVM memory module may reduce the power consumption of the whole memory system.
IPC 8 full level
CPC (source: EP US)
G06F 1/3225 (2013.01 - EP US); G06F 1/3275 (2013.01 - EP US); G06F 3/0625 (2013.01 - EP US); G06F 3/0647 (2013.01 - EP US); G06F 3/068 (2013.01 - EP US); G06F 9/5094 (2013.01 - EP US); G06F 12/0638 (2013.01 - EP US); G06F 9/5016 (2013.01 - EP US); G06F 2212/1028 (2013.01 - EP US); G06F 2212/205 (2013.01 - EP US); G06F 2212/251 (2013.01 - EP US); Y02D 10/00 (2017.12 - EP US); Y02D 30/50 (2020.08 - EP US)
Citation (search report)
- [Y] US 2011093654 A1 20110421 - ROBERTS DAVID ANDREW [GB], et al
- [Y] US 2011029797 A1 20110203 - VADEN THOMAS L [US]
- [A] WO 2008055269 A2 20080508 - VIRIDENT SYSTEMS INC [US], et al
- [XI] XIANGYONG OUYANG ET AL: "SSD-Assisted Hybrid Memory to Accelerate Memcached over High Performance Networks", PARALLEL PROCESSING (ICPP), 2012 41ST INTERNATIONAL CONFERENCE ON, IEEE, 10 September 2012 (2012-09-10), pages 470 - 479, XP032265802, ISBN: 978-1-4673-2508-0, DOI: 10.1109/ICPP.2012.54
- [A] LUIZ E RAMOS ET AL: "Page placement in hybrid memory systems", SUPERCOMPUTING, ACM, 2 PENN PLAZA, SUITE 701 NEW YORK NY 10121-0701 USA, 31 May 2011 (2011-05-31), pages 85 - 95, XP058003717, ISBN: 978-1-4503-0102-2, DOI: 10.1145/1995896.1995911
- [A] YONGSOO JOO ET AL: "Demand paging for OneNANDTM Flash eXecute-in-place", CODES + ISSS 2006. INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN & SYSTEM SYNTHESIS. SEOUL, KOREA, OCT. 22 - 25, 2006; [INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS], NEW YORK, NY : ACM, US, 22 October 2006 (2006-10-22), pages 229 - 234, XP031636186, ISBN: 978-1-59593-370-6
- See references of WO 2014059613A1
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
DOCDB simple family (publication)
EP 2911056 A1 20150826; EP 2911056 A4 20160928; EP 2911056 B1 20180718; CN 104380259 A 20150225; CN 104380259 B 20180921; US 2015220135 A1 20150806; US 9927860 B2 20180327; WO 2014059613 A1 20140424
DOCDB simple family (application)
EP 12886768 A 20121017; CN 2012083062 W 20121017; CN 201280001333 A 20121017; US 201514685272 A 20150413