EP 2983295 A1 20160210 - Delay-locked loop arrangement and method for operating a delay-locked loop circuit
Title (en)
Delay-locked loop arrangement and method for operating a delay-locked loop circuit
Title (de)
Verzögerungsregelschleifenanordnung und Verfahren zum Betreiben einer Verzögerungsregelschleife
Title (fr)
Système de boucle à retard de phase et procédé pour faire fonctionner un circuit en boucle à retard de phase
Publication
Application
Priority
EP 14179636 A 20140804
Abstract (en)
Delay-locked loop arrangement comprising a steering unit (STR) and a delay-locked loop circuit (DLL). The steering unit (STR) is configured to generate a reference clock signal (S_rclk) and a main clock signal (S_mclk) wherein the reference clock signal (S_rclk) and the main clock signal (S_mclk) feature a first frequency during a performance mode of operation. The reference clock signal (S_rclk) and the main clock signal (S_mclk) feature a second frequency being lower than the first frequency and a phase delay with respect to each other during a sleep mode of operation. The delay-locked loop circuit (DLL) is configured to generate an error signal (S_err) depending on a comparison of the reference clock signal (S_rclk) and a feedback signal (S_fb). Furthermore, the delay-locked loop circuit (DLL) generates the feedback signal (S_fb) depending on the error signal (S_err) and on the main clock signal (S mclk).
IPC 8 full level
H03L 7/081 (2006.01); H03L 7/10 (2006.01)
CPC (source: EP US)
H03K 5/135 (2013.01 - EP US); H03L 7/08 (2013.01 - US); H03L 7/0802 (2013.01 - EP US); H03L 7/0812 (2013.01 - EP US); H03K 2005/00058 (2013.01 - EP US)
Citation (search report)
- [A] US 2002125926 A1 20020912 - SCHNELL JOSEF [US]
- [A] US 2007152723 A1 20070705 - AHN JI-HYUN [KR], et al
- [A] US 2009085618 A1 20090402 - SCHNEIDER JACOB S [US], et al
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
EP 2983295 A1 20160210; EP 2983295 B1 20190410; US 2016036426 A1 20160204; US 9571080 B2 20170214
DOCDB simple family (application)
EP 14179636 A 20140804; US 201514817446 A 20150804