EP 3016143 A1 20160504 - A method for forming a transistor structure comprising a fin-shaped channel structure
Title (en)
A method for forming a transistor structure comprising a fin-shaped channel structure
Title (de)
Verfahren zur Herstellung einer Transistorstruktur mit einer flossenförmigen Kanalstruktur
Title (fr)
Procédé de formation d'une structure de transistor comprenant une structure de canal en forme d'ailette
Publication
Application
Priority
EP 14191340 A 20141031
Abstract (en)
A method for forming a transistor structure comprising a fin-shaped channel structure, comprising: - providing a layer stack embedded laterally in STI structures; - recessing the STI structures adjacent to the layer stack to thereby expose an upper portion of the layer stack, the upper portion comprising at least a channel portion; - providing one or more protection layers on the upper portion of the layer stack; - after providing one or more protection layers, further recessing the STI structures selectively to the protection layers and the layer stack, to thereby expose a central portion of the layer stack; - removing the central portion of the layer stack, resulting in a freestanding upper part and a lower part of the layer stack being physically separated from each other; wherein providing the layer stack comprises providing an etch stop layer at a position directly below the channel portion, such that the freestanding upper part of the layer stack comprises an etch stop layer at its lower surface after selectively removing the central portion.
IPC 8 full level
H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC (source: EP US)
H01L 21/32 (2013.01 - US); H01L 21/32055 (2013.01 - US); H01L 21/76224 (2013.01 - US); H01L 29/0649 (2013.01 - US); H01L 29/42392 (2013.01 - EP US); H01L 29/66742 (2013.01 - EP US); H01L 29/78696 (2013.01 - EP US)
Citation (applicant)
- US 2011316080 A1 20111229 - LUO ZHIJIONG [US], et al
- Z.Y. CHENG; M.T. CURRIE; C.W. LEITZ; G. TARASCHI; A. PITERA; M.L. LEE; T.A. LANGDO; J.L. HOYT; D.A. ANTONIADIS; E.A. FITZGERALD: "SiGe-On-nsuator (SGOI): Substrate Preparation and MOSFET Fabrication for Emectron Mobility Evaluation", IEEE INTERNATIONAL SOI CONFERENCE, 2001, pages 13
- G. C. DESALVO; W. F. TSENG; J. COMAS: "Etch Rates and Selectivities of Citric Acid/Hydrogen Peroxide on GaAs, Al Ga As,ln Ga As,Ln Ga ,As,ln Al . As, and InP", J. ELECTROCHEM. SOC, vol. 139, no. 3, 1992, pages 831
Citation (search report)
- [XI] US 8816428 B1 20140826 - MILLER ROBERT J [US], et al
- [Y] US 2007241420 A1 20071018 - CHOI KANG SIK [KR]
- [Y] US 2002086472 A1 20020704 - ROBERDS BRIAN [US], et al
- [A] US 2003190766 A1 20031009 - GONZALEZ FERNANDO [US], et al
- [A] US 2013256784 A1 20131003 - VELLIANITIS GEORGIOS [BE], et al
- [A] US 2014084342 A1 20140327 - CAPPELLANI ANNALISA [US], et al
- [A] US 2005196924 A1 20050908 - MIMURA ATSUSHI [JP]
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
EP 3016143 A1 20160504; EP 3016143 B1 20230906; US 2016126131 A1 20160505; US 9633891 B2 20170425
DOCDB simple family (application)
EP 14191340 A 20141031; US 201514924832 A 20151028