EP 3152836 A4 20180606 - BOOTSTRAPPING CIRCUIT AND UNIPOLAR LOGIC CIRCUITS USING THE SAME
Title (en)
BOOTSTRAPPING CIRCUIT AND UNIPOLAR LOGIC CIRCUITS USING THE SAME
Title (de)
BOOTSTRAPPING-SCHALTUNG UND EINPOLIGE LOGISCHE SCHALTUNGEN DAMIT
Title (fr)
CIRCUIT D'AMORÇAGE ET CIRCUITS LOGIQUES UNIPOLAIRES L'UTILISANT
Publication
Application
Priority
- US 201462007064 P 20140603
- US 2015033155 W 20150529
Abstract (en)
[origin: WO2015187482A1] Exemplary embodiments of the present disclosure are directed to a bootstrapping module and logic circuits utilizing the bootstrapping module to compensate for a weak high condition. The bootstrapping module can be implemented using transistors have a single channel type that is the same as the channel type of transistors utilized in the logic circuits such that a truly unipolar circuit can be realized while addressing the weak high problem of such unipolar circuits.
IPC 8 full level
H03K 17/06 (2006.01); H03K 3/356 (2006.01); H03K 19/017 (2006.01); H03K 19/094 (2006.01)
CPC (source: EP KR US)
H03K 3/356113 (2013.01 - US); H03K 19/01714 (2013.01 - EP KR US); H03K 19/094 (2013.01 - EP KR US)
Citation (search report)
- [XI] US 5694061 A 19971202 - MOROSAWA KATSUHIKO [JP], et al
- [XA] FURMAN ET AL: "Address Buffer True Complement Generator", IP.COM JOURNAL, IP.COM INC., WEST HENRIETTA, NY, US, 1 April 1976 (1976-04-01), XP013074369, ISSN: 1533-0001
- See references of WO 2015187482A1
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
DOCDB simple family (publication)
WO 2015187482 A1 20151210; WO 2015187482 A8 20160128; CN 106664081 A 20170510; EP 3152836 A1 20170412; EP 3152836 A4 20180606; KR 20170015933 A 20170210; US 10200038 B2 20190205; US 2017111046 A1 20170420
DOCDB simple family (application)
US 2015033155 W 20150529; CN 201580033265 A 20150529; EP 15802369 A 20150529; KR 20167035956 A 20150529; US 201515316007 A 20150529