Global Patent Index - EP 3278118 A1

EP 3278118 A1 20180207 - INTEGRATED CIRCUIT (IC) TEST SOCKET WITH FARADAY CAGE BACKGROUND

Title (en)

INTEGRATED CIRCUIT (IC) TEST SOCKET WITH FARADAY CAGE BACKGROUND

Title (de)

INTEGRIERTER SCHALTKREISPRÜFSTECKER MIT FARADAYKÄFIG

Title (fr)

PRISE DE TEST DE CIRCUIT INTÉGRÉ (CI) AVEC ARRIÈRE-PLAN FORMANT CAGE DE FARADAY

Publication

EP 3278118 A1 20180207 (EN)

Application

EP 15888016 A 20150401

Priority

US 2015023839 W 20150401

Abstract (en)

[origin: WO2016160009A1] An integrated circuit test socket includes a highly conductive compliant material that is cut and installed into the test socket. The conductive material draws electrical charge away from the test socket, leading to more accurate testing. The test socket base is grounded, and a ground current runs through the base and into conductive strips. The configuration forms an electromagnetic impulse shield, protecting the chip from electromagnetic interference. The compliance of the shield material allows the shield to be sealed when activated, ensuring that the electromagnetic impulse shield is complete around the semi-conductor chip.

IPC 8 full level

G01R 1/02 (2006.01); G01R 1/067 (2006.01); G01R 1/18 (2006.01); H01L 21/66 (2006.01)

CPC (source: EP KR)

G01R 1/0466 (2013.01 - EP KR); G01R 1/18 (2013.01 - EP KR)

Designated contracting state (EPC)

AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

Designated extension state (EPC)

BA ME

DOCDB simple family (publication)

WO 2016160009 A1 20161006; CN 107683416 A 20180209; EP 3278118 A1 20180207; EP 3278118 A4 20190116; JP 2018511806 A 20180426; KR 20170134612 A 20171206; PH 12017501810 A1 20180423; SG 11201708108V A 20171030

DOCDB simple family (application)

US 2015023839 W 20150401; CN 201580078675 A 20150401; EP 15888016 A 20150401; JP 2017551649 A 20150401; KR 20177031813 A 20150401; PH 12017501810 A 20171002; SG 11201708108V A 20150401