EP 3770953 A1 20210127 - METHOD FOR FORMING A MULTI-LEVEL INTERCONNECT STRUCTURE IN A SEMICONDUCTOR DEVICE
Title (en)
METHOD FOR FORMING A MULTI-LEVEL INTERCONNECT STRUCTURE IN A SEMICONDUCTOR DEVICE
Title (de)
VERFAHREN ZUR HERSTELLUNG EINER MEHRSTUFIGEN VERBINDUNGSSTRUKTUR IN EINEM HALBLEITERBAUELEMENT
Title (fr)
PROCÉDÉ DE FORMATION D'UNE STRUCTURE D'INTERCONNEXION À NIVEAUX MULTIPLES DANS UN DISPOSITIF À SEMICONDUCTEUR
Publication
Application
Priority
EP 19187767 A 20190723
Abstract (en)
According to an aspect of the present inventive concept there is provided a method for forming a multi-level interconnect structure in a semiconductor device comprising: a first interconnection level (110) including a first dielectric layer (112) and a first conductive structure (114); a second interconnection level (120) arranged above the first interconnection level (110) and including a second dielectric layer (122) and a second conductive structure (124); a third interconnection level (130) arranged above the second interconnection level (120) and including a third dielectric layer (132) and a third conductive structure (134); wherein the method comprises: forming a trench in the third dielectric layer; providing a first sacrificial material in the trench; and thereafter forming a via extending through the third interconnection level to the second conductive structure; providing a second sacrificial material in the via; forming a multi-level via extending through the third interconnection level to the first conductive structure; removing the first sacrificial material; removing the second sacrificial material; depositing a conductive material at least partially filling: the trench, thereby forming the third conductive structure (134); the via, thereby forming a via structure (102) forming an electrical connection between the third conductive structure (134) and the second conductive structure (124); and the multi-level via, thereby forming a multi-level via structure (104) forming an electrical connection between the third conductive structure (134) and the first conductive structure (114).
IPC 8 full level
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC (source: EP US)
H01L 21/76808 (2013.01 - EP US); H01L 21/76813 (2013.01 - US); H01L 21/76816 (2013.01 - EP); H01L 23/5226 (2013.01 - EP US); H01L 23/528 (2013.01 - EP US); H01L 23/53209 (2013.01 - US); H01L 23/53295 (2013.01 - US)
Citation (search report)
- [Y] US 9373582 B1 20160621 - FEURPRIER YANNICK [US], et al
- [Y] US 10312188 B1 20190604 - SRIVASTAVA RAVI P [US], et al
- [A] US 2018130699 A1 20180510 - ZHANG XUNYUAN [US], et al
- [A] US 2018342454 A1 20181129 - ZHANG XUNYUAN [US], et al
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
EP 3770953 A1 20210127; EP 3770953 B1 20230412; US 11088070 B2 20210810; US 2021028106 A1 20210128
DOCDB simple family (application)
EP 19187767 A 20190723; US 202016936271 A 20200722