EP 3881216 A1 20210922 - COMPUTER-IMPLEMENTED METHOD FOR SIMULATING AN ELECTRICAL CIRCUIT
Title (en)
COMPUTER-IMPLEMENTED METHOD FOR SIMULATING AN ELECTRICAL CIRCUIT
Title (de)
COMPUTERIMPLEMENTIERTES VERFAHREN ZUR SIMULATION EINER ELEKTRISCHEN SCHALTUNG
Title (fr)
PROCÉDÉ MIS EN OEUVRE PAR ORDINATEUR POUR LA SIMULATION D'UN CIRCUIT ÉLECTRIQUE
Publication
Application
Priority
- DE 102018128653 A 20181115
- EP 2019081535 W 20191115
Abstract (en)
[origin: WO2020099659A1] The invention discloses and describes a computer-implemented method (1) for simulating an electrical circuit (2) by means of at least one computing unit (3), wherein the electrical circuit (2) comprises circuit components (L, R, Ti) having switch elements (Ti), the switch elements (Ti) being capable of assuming either a conductive or a blocking switched state. The circuit (2) is described by a mathematical representation MR, and the circuit is calculated on the computing unit (3) for each overall switched state (SSTi) by numerically solving the mathematical representation MR describing the overall switched state (SSTi). A simple way of modelling the circuit (2) with a plurality of - at best with all - combinations of the overall switched states (SSTi) of the switch elements (Ti) and thus with a plurality of - at best with all - overall switched states (SSTi) in a mathematical representation and of numerically calculating same is realised in that a conductive switch element (Ti) in the circuit is represented by a switch coil (7), in that a blocking switch element (Ti) in the circuit (2) is represented by a switch capacitor (8), in that the electrical behaviour of the switch coil (7) and the switch capacitor (8) is described by structurally identical time-discrete switch equations iS, k, such that the structurally identical time-discrete switch equations iS, k for the switch elements (Ti) are used to provide a switched-state-independent time-discrete state space representation H, Φ, Cd, Dd for all total switched states (SSTi) of the circuit (3), and the simulation is performed on the computing unit (3) on the basis of the switched-state-independent time-discrete state space representation H, Φ, Cd, Dd for all total switched states (SSTi) of the circuit (2).
IPC 8 full level
G06F 30/367 (2020.01)
CPC (source: EP US)
G06F 30/33 (2020.01 - EP); G06F 30/3308 (2020.01 - US); G06F 30/337 (2020.01 - US); G06F 30/367 (2020.01 - EP)
Citation (search report)
See references of WO 2020099659A1
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
DE 102019130971 A1 20200520; CN 113039548 A 20210625; EP 3881216 A1 20210922; JP 2022507574 A 20220118; JP 7420803 B2 20240123; US 2021264084 A1 20210826; WO 2020099659 A1 20200522
DOCDB simple family (application)
DE 102019130971 A 20191115; CN 201980075229 A 20191115; EP 19805278 A 20191115; EP 2019081535 W 20191115; JP 2021526640 A 20191115; US 202117241821 A 20210427