EP 3888117 A1 20211006 - METHOD FOR DETERMINING A SHEET RESISTANCE OF A SEMICONDUCTOR SUBSTRATE AFTER PLASMA-IMMERSION ION IMPLANTATION AND THERMAL ANNEALING
Title (en)
METHOD FOR DETERMINING A SHEET RESISTANCE OF A SEMICONDUCTOR SUBSTRATE AFTER PLASMA-IMMERSION ION IMPLANTATION AND THERMAL ANNEALING
Title (de)
VERFAHREN ZUR BESTIMMUNG EINES SCHICHTWIDERSTANDES EINES HALBLEITERSUBSTRATS NACH PLASMAIMMERSIONIONENIMPLANTATION UND THERMISCHEM GLÜHEN
Title (fr)
PROCEDE DE DETERMINATION D'UNE RESISTANCE CARREE D'UN SUBSTRAT SEMICONDUCTEUR APRES IMPLANTATION IONIQUE PAR IMMERSION PLASMA ET RECUIT THERMIQUE
Publication
Application
Priority
- FR 1871842 A 20181126
- EP 2019082633 W 20191126
Abstract (en)
[origin: WO2020109333A1] One aspect of the invention relates to a method for determining a sheet resistance of a semiconductor substrate after plasma-immersion ion implantation and thermal annealing, by means of a reflectance of the semiconductor substrate after its plasma-immersion ion implantation and before its thermal annealing, and of a lookup table indexing reflectance before thermal annealing and sheet resistance after thermal annealing.
IPC 8 full level
H01L 21/66 (2006.01); C23C 14/48 (2006.01); H01J 37/32 (2006.01); H01L 31/00 (2006.01)
CPC (source: EP)
H01J 37/32412 (2013.01); H01L 22/14 (2013.01); H01L 22/20 (2013.01); H01L 31/1804 (2013.01); Y02E 10/547 (2013.01); Y02P 70/50 (2015.11)
Citation (search report)
See references of WO 2020109333A1
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
FR 3089014 A1 20200529; FR 3089014 B1 20220805; EP 3888117 A1 20211006; JP 2022511762 A 20220201; WO 2020109333 A1 20200604
DOCDB simple family (application)
FR 1871842 A 20181126; EP 19806279 A 20191126; EP 2019082633 W 20191126; JP 2021529398 A 20191126