EP 3910351 B1 20240320 - INTEGRATED CIRCUIT AND METHOD OF PERFORMING A BIST PROCEDURE
Title (en)
INTEGRATED CIRCUIT AND METHOD OF PERFORMING A BIST PROCEDURE
Title (de)
INTEGRIERTE SCHALTUNG UND VERFAHREN ZUR DURCHFÜHRUNG EINES BIST-VERFAHRENS
Title (fr)
CIRCUIT INTÉGRÉ ET PROCÉDÉ DE RÉALISATION D'UNE PROCÉDURE D'AUTOSURVEILLANCE
Publication
Application
Priority
EP 20305491 A 20200513
Abstract (en)
[origin: EP3910351A1] An integrated circuit and a method of performing a built-in-self-test (BIST) procedure in an integrated circuit. The integrated circuit includes a plurality of radio circuits and a switching network for performing a built-in-self-test (BIST) procedure. The switching network includes a plurality of combiners, a plurality of transmitter connection switches, a combiner switch, a splitter switch, a plurality of splitters and a plurality of receiver connection switches. The switching network may also include a splitter bypass switch and/or a combiner bypass switch. The components of the switching network may operate to route signals between outputs and inputs of the radio circuit to implement the built-in-self-test procedure in one or more modes involving either parallel or sequential testing of the components of the radio circuits. A diagnostic mode is also envisaged.
IPC 8 full level
G01R 31/3187 (2006.01); G01R 31/28 (2006.01); H04B 17/19 (2015.01)
CPC (source: EP US)
G01R 31/2884 (2013.01 - US); G01R 31/3187 (2013.01 - EP); H01P 5/16 (2013.01 - US); H04B 1/1638 (2013.01 - US); H04B 17/19 (2015.01 - EP); H04B 17/29 (2015.01 - US); G01R 31/2856 (2013.01 - EP)
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
DOCDB simple family (publication)
EP 3910351 A1 20211117; EP 3910351 B1 20240320; US 11463182 B2 20221004; US 2021359773 A1 20211118
DOCDB simple family (application)
EP 20305491 A 20200513; US 202117301723 A 20210413