(19)
(11)EP 0 154 551 A3

(12)EUROPEAN PATENT APPLICATION

(88)Date of publication A3:
16.12.1987 Bulletin 1987/51

(43)Date of publication A2:
11.09.1985 Bulletin 1985/37

(21)Application number: 85301542

(22)Date of filing:  06.03.1985
(84)Designated Contracting States:
DE FR GB NL

(30)Priority: 06.03.1984 US 586681

(71)Applicant: CODEX CORPORATION
 ()

(72)Inventors:
  • Qureshi, Shahid U.H.
     ()
  • Chamberlin, George P.
     ()

  


(54)Apparatus for enabling a first processor to cause a second processor to effect a transfer of data between said processors


(57) Apparatus is described for enabling a first processor to cause a second processor to effect a transfer of data between the processors in accordance with data transfer commands sent from the first processor to the second processor. The processors each have a program instruction memory for enabling the processors to operate independently and simultaneously when no data transfer is occurring between them. The apparatus comprises data transfer circuitry connected between the processors for enabling the data to be transferred. A program instruction decoder is associated with the second processor for normally decoding and executing instructions stored in the program instruction memory of the second processor when no data transfer is occurring. Routing circuitry carries the data transfer commands from the first processor to the program instruction decoder for decoding and executing to provide signals to the data transfer circuitry to effect a transfer of data.







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