(19)
(11)EP 1 180 689 A3

(12)EUROPEAN PATENT APPLICATION

(88)Date of publication A3:
02.07.2003 Bulletin 2003/27

(43)Date of publication A2:
20.02.2002 Bulletin 2002/08

(21)Application number: 01306815.0

(22)Date of filing:  09.08.2001
(51)International Patent Classification (IPC)7G01R 23/15
(84)Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR
Designated Extension States:
AL LT LV MK RO SI

(30)Priority: 14.08.2000 JP 2000245837

(71)Applicant: NEC CORPORATION
Tokyo (JP)

(72)Inventor:
  • Saito, Hirofumi, Nec Ic Microcomputer Systems, Ltd
    Kawasaki-shi, Kanagawa (JP)

(74)Representative: Moir, Michael Christopher et al
Mathys & Squire 100 Gray's Inn Road
London WC1X 8AL
London WC1X 8AL (GB)

  


(54)Frequency determination circuit for a data processing unit


(57) A frequency determination circuit (204) determines, with a high precision, whether the frequency of a clock signal (CLK) is higher or lower than a reference frequency. A capacitor element (251) is charged/discharged with a power supply voltage (VDD) that is cycled by a switching transistor according to the clock signal. A comparator circuit (215) compares a constant reference voltage produced by a band-gap regulator (211) circuit from the power supply voltage with a voltage stored in the capacitor element. A high/low determination circuit (216) determines, from the output signal of the comparator circuit, whether the clock signal frequency is higher or lower than a predetermined reference frequency. This makes it possible to determine with precision whether the clock signal has a low frequency or a high frequency.







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