| (11) | EP 1 180 689 A3 |
(12) | EUROPEAN PATENT APPLICATION |
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(54) | Frequency determination circuit for a data processing unit |
(57) A frequency determination circuit (204) determines, with a high precision, whether the frequency of a clock signal (CLK) is higher or lower than a reference frequency. A capacitor element (251) is charged/discharged with a power supply voltage (VDD) that is cycled by a switching transistor according to the clock signal. A comparator circuit (215) compares a constant reference voltage produced by a band-gap regulator (211) circuit from the power supply voltage with a voltage stored in the capacitor element. A high/low determination circuit (216) determines, from the output signal of the comparator circuit, whether the clock signal frequency is higher or lower than a predetermined reference frequency. This makes it possible to determine with precision whether the clock signal has a low frequency or a high frequency. |