(19)
(11)EP 1 345 032 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
13.10.2010 Bulletin 2010/41

(21)Application number: 03075748.8

(22)Date of filing:  14.03.2003
(51)Int. Cl.: 
G01R 1/073  (2006.01)
H01L 21/66  (2006.01)
G01R 31/311  (2006.01)

(54)

High speed method of measuring the threshold voltage and surface doping

Hochgeschwindigkeitsverfahren zur Messung der Schwellenspannung und der Flächendotierung

Procédé de mesure à grande vitesse de tension de seuil et de dopage en surface


(84)Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR

(30)Priority: 15.03.2002 US 99207

(43)Date of publication of application:
17.09.2003 Bulletin 2003/38

(73)Proprietor: Solid State Measurements, Inc.
Wexford, Pennsylvania 15090 (US)

(72)Inventor:
  • Howland, William H.
    Pittsburgh, Pennsylvania 15090 (US)

(74)Representative: Jorritsma, Ruurd 
Nederlandsch Octrooibureau Postbus 29720
2502 LS Den Haag
2502 LS Den Haag (NL)


(56)References cited: : 
US-A- 4 509 012
US-A- 5 786 231
US-A- 5 521 525
US-A- 6 037 781
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    BACKGROUND OF THE INVENTION


    Field of the Invention



    [0001] This invention relates generally to a method for measuring electrical properties of a semiconductor wafer and, more particularly, for high speed measuring of threshold voltage and average surface doping.

    Description of Related Art



    [0002] Conventional methods of characterizing the quality of a dielectric formed on a silicon surface of a semiconductor wafer include capacitance-voltage (CV) techniques. Measurements of threshold voltage and average surface doping concentration are taken in this manner. Specifically, CV measurements require that a measurement site on and adjacent the silicon surface of the semiconductor wafer be first biased into deep depletion, a non-equilibrium condition. The measurement site must then be returned to thermodynamic equilibrium before threshold voltage and average surface doping can be measured. Equilibrium is reached by exposing the measurement site to a light source after it reaches deep depletion.

    [0003] With reference to Fig. 1, heretofore, a CV curve 8 was generated by superimposing an AC signal on a DC signal and changing the DC signal applied to the measurement site from a starting voltage having a first polarity to an ending voltage having a second, opposite polarity and measuring the resultant capacitance. When the starting voltage is applied, an accumulation region is observed of approximately constant capacitance 10. As the voltage approaches zero and changes polarity, the capacitance decreases as the measurement site becomes biased into depletion 12 and this capacitance eventually reaches deep depletion 14. At deep depletion 14, a light is directed at the measurement site while the voltage is held constant 16 whereupon the measurement site returns to equilibrium 18. When the measurement site reaches equilibrium 18, the light is turned off and the voltage is decreased 20 toward zero. The capacitance levels off during this stage. From the thus derived CV curve, threshold voltage and average surface doping can be determined in manners known in the art.

    [0004] US 5521525 and US 4509012 disclose the aforementioned approach.

    [0005] This process provides a slow means for reaching equilibrium, taking approximately ½ minute for measurement. However, for production speed, threshold voltage and average surface doping must be measured very quickly, on the order of seconds. Therefore, a need exists for a method for measuring threshold voltage and average surface doping quickly.

    [0006] It is, therefore, an object of this invention to provide an improved method for reaching equilibrium whereupon threshold voltage and average surface doping concentration can be calculated quicker (i.e., on the order of seconds), as compared to the conventional methods.

    SUMMARY OF THE INVENTION



    [0007] A method according to the present invention as defined in claim 1 includes exposing a measurement site to a high intensity light immediately before a measurement sweep begins. A CV measurement sweep is then made with the voltage increasing from zero volts to its maximum positive or negative voltage. (A maximum positive voltage is used for p-type silicon whereas a maximum negative voltage is used for n-type silicon.) When the voltage reaches its maximum voltage, the light is turned off and the response of the measurement site to the absence of light thereon is measured until the capacitance reaches equilibrium.

    [0008] The method allows thermodynamic equilibrium to be reached very quickly after the CV measurement sweep and, thereby, for very high speed threshold voltage and average surface doping concentration measurements.

    BRIEF DESCRIPTION OF THE DRAWINGS



    [0009] Fig. 1 is a CV graph of a conventional method for calculating threshold voltage and average surface doping concentration on a semiconductor wafer;

    [0010] Fig. 2 is a schematic front view of an apparatus for carrying out a method according to the present invention;

    [0011] Fig. 3 is a CV graph of a method according to the present invention for calculating threshold voltage and average surface doping concentration on a semiconductor wafer; and

    [0012] Fig. 4 is a CV graph showing the CV graphs of Figs. 1 and 3 superimposed on each other.

    DESCRIPTION OF THE PREFERRED EMBODIMENT



    [0013] A complete understanding of the invention will be obtained from the following description when taken in connection with the accompanying drawing figures wherein like reference characters identify like parts throughout.

    [0014] Referring to Fig. 2, an apparatus for carrying out a method according to the present invention includes a semiconductor wafer 100 received on a chuck 102. A measurement probe 104 is applied to a measurement site 106 on a silicon surface 108 of semiconductor wafer 100. A light source 110, such as a xenon lamp, is positioned to direct light 112 onto measurement site 106 of semiconductor wafer 100. A measurement means 114 is connected between probe 104 and chuck 102 for applying a CV stimulus to semiconductor wafer 100 and for measuring the response of semiconductor wafer 100 to the stimulus.

    [0015] Referring to Fig. 3, a CV curve 28 is generated by directing light toward measurement site 106 on silicon surface 108 of semiconductor wafer 100 before a CV measurement sweep begins. A CV measurement sweep 32 is then applied to measurement site 106, with the voltage being swept from zero volts to a maximum negative or positive voltage depending on whether semiconductor wafer 100 is formed from n-type silicon or p-type silicon, respectively. The capacitance is level during this sweep. When the maximum voltage is reached, light source 110 is turned off 34 and the voltage is held constant 36. The capacitance of measurement site 106 is measured until it reaches equilibrium 38. From this CV curve, threshold voltage and average doping surface concentration can be determined. With this method, deep depletion is never achieved.

    [0016] Referring to Fig. 4, the CV curve 28 generated by the present invention is graphed with the CV curve 8 generated by conventional methods. Equilibrium of the silicon surface of the semiconductor wafer is designated as 44.

    [0017] It will be understood by those skilled in the art that while the foregoing description sets forth in detail the preferred embodiment of the present invention, modifications, additions, and changes might be made thereto without departing from the scope of the invention as defined by the claims.


    Claims

    1. A method of measuring electrical properties of a semiconductor wafer, comprising the steps of:

    a) exposing a silicon surface of a measurement site of a semiconductor wafer to light;

    b) sweeping the measurement site with a DC voltage having an AC voltage superimposed thereon from a first voltage to a second voltage said first voltage being zero volts;

    c) terminating receipt of the light by the silicon surface when the second voltage is achieved;

    d) holding the second voltage constant until the measurement site reaches equilibrium;

    e) measuring capacitance of the semiconductor wafer as a function of the DC voltage applied in step d); and

    f) calculating the electrical properties of the semiconductor wafer from the measurement taken in step e).


     
    2. The method as set forth in claim 1, wherein the electrical properties are threshold voltage and average surface doping concentration.
     
    3. The method as set forth in claim 1, wherein the second voltage is a maximum negative or positive voltage based on whether the semiconductor wafer is formed from n-type silicon or p-type silicon, respectively.
     


    Ansprüche

    1. Ein Verfahren zur Messung von elektrischen Eigenschaften eines Halbleiterwafers, umfassend die Schritte:

    a) Belichten einer Siliziumoberfläche einer Messstelle eines Halbleiterwafers,

    b) Überstreichen der Messstelle mit einer Gleichspannung, der eine Wechselspannung überlagert ist, von einer ersten Spannung bis zu einer zweiten Spannung, wobei die erste Spannung null Volt beträgt,

    c) Beenden des Belichtens der Siliziumoberfläche, wenn die zweite Spannung erreicht ist,

    d) Halten der zweiten Spannung, bis die Messstelle ein Gleichgewicht erreicht,

    e) Messen der Kapazität des Halbleiterwafers in Abhängigkeit der in Schritt d) angelegten Gleichspannung, und

    f) Berechnen der elektrischen Eigenschaften des Halbleiterwafers aus der in Schritt e) durchgeführten Messung.


     
    2. Das Verfahren gemäß Anspruch 1, wobei die elektrischen Eigenschaften Schwellenspannung und mittlere Oberflächendotierungskonzentration sind.
     
    3. Das Verfahren gemäß Anspruch 1, wobei die zweite Spannung eine maximale negative oder positive Spannung ist, abhängig davon, ob der Halbleiterwafer aus Silizium vom n-Typ oder aus Silizium vom p-Typ hergestellt wurde.
     


    Revendications

    1. Procédé de mesure de propriétés électriques d'une tranche de semi-conducteur, comprenant les étapes consistant à :

    a) exposer à la lumière une surface en silicium d'un emplacement de mesure d'une tranche de semi-conducteur ;

    b) balayer l'emplacement de mesure avec une tension continue à laquelle, d'une première tension à une seconde tension, est superposée une tension alternative, ladite première tension étant de zéro volt ;

    c) mettre fin à la réception de la lumière par la surface en silicium lorsque se termine la seconde tension ;

    d) maintenir constante la seconde tension jusqu'à ce que l'emplacement de mesure parvienne à l'équilibre ;

    e) mesurer la capacité de la tranche de semi-conducteur en fonction de la tension continue appliquée lors de l'étape d) ; et

    f) calculer les propriétés électriques de la tranche de semi-conducteur d'après la mesure faite lors de l'étape e).


     
    2. Procédé selon la revendication 1, dans lequel les propriétés électriques sont la tension de seuil et la concentration moyenne de dopage en surface.
     
    3. Procédé selon la revendication 1, dans lequel la seconde tension est une tension maximale négative ou positive selon que, respectivement, la tranche de semi-conducteur est constituée de silicium de type N ou de silicium de type P.
     




    Drawing









    REFERENCES CITED IN THE DESCRIPTION



    This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

    Patent documents cited in the description