(19) | |
| (11) | EP 0 196 736 A3 |
(12) | EUROPEAN PATENT APPLICATION |
(88) | Date of publication A3: | | 23.08.1989 Bulletin 1989/34 |
(43) | Date of publication A2: | | 08.10.1986 Bulletin 1986/41 |
(22) | Date of filing: 20.01.1986 |
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(84) | Designated Contracting States: | | DE FR GB IT NL |
(30) | Priority: | 23.03.1985 GB 8507610
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(71) | Applicant: INTERNATIONAL COMPUTERS LIMITED | | Putney, London, SW15 1SW (GB) |
| (72) | Inventor: | | - Eaton, John Richard
Salford
Lancashire (GB)
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(74) | Representative: Guyatt, Derek Charles et al | | Intellectual Property Department
International Computers Limited
Cavendish Road Stevenage, Herts, SG1 2DY Stevenage, Herts, SG1 2DY (GB) |
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(54) | Microprogram controlled data processing apparatus |
(57) A microprogrammed processor in which instructions have alternative fast and slow microprogram sequences. The fast sequences are designed for speed, and can detect exception conditions but do not resolve them. The slow sequences perform all the necessary tests to resolve these conditions. When a fast sequence detects an exception, that sequence is abandoned, and the corresponding slow sequence is run.