(19)
(11)EP 1 932 111 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
26.06.2019 Bulletin 2019/26

(21)Application number: 06795444.6

(22)Date of filing:  31.08.2006
(51)International Patent Classification (IPC): 
G06T 3/40(2006.01)
(86)International application number:
PCT/IB2006/002466
(87)International publication number:
WO 2007/026244 (08.03.2007 Gazette  2007/10)

(54)

METHODS AND APPARATUS FOR RETRIEVING AND COMBINING SAMPLES OF GRAPHICS INFORMATION

VERFAHREN UND VORRICHTUNGEN ZUM ABRUFEN UND KOMBINIEREN VON GRAFIKINFORMATIONS-SAMPLES

PROCEDES ET APPAREILS PERMETTANT D'EXTRAIRE ET DE COMBINER DES ECHANTILLONS D'INFORMATIONS GRAPHIQUES


(84)Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

(30)Priority: 31.08.2005 US 216690

(43)Date of publication of application:
18.06.2008 Bulletin 2008/25

(73)Proprietor: ATI Technologies Inc.
Markham, ON L3T 7X6 (CA)

(72)Inventors:
  • BRENNAN, Chris
    Holden, MA (US)
  • ISIDORO, John, R.
    Santa Clara, CA (US)
  • DeLAURIER, Anthony
    Winter Springs, FL 32708 (US)

(74)Representative: Robinson, David Edward Ashdown et al
Marks & Clerk LLP 1 New York Street
Manchester M1 4HD
Manchester M1 4HD (GB)


(56)References cited: : 
WO-A2-00/11605
US-B1- 6 476 807
GB-A- 2 400 778
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    TECHNICAL FIELD



    [0001] The present disclosure relates to a method and a logic circuit for retrieving and combining graphics information and, more particularly, retrieving sampled channel data and combining the sample channel data into a single vector.

    BACKGROUND



    [0002] In image processing circuits, such as a graphics processing unit, logic and algorithms are typically included to perform texturing of image data to be displayed. More specifically, image filtering, which is performed in the texturing process such as in a texture pipeline, is performed following many different techniques. As examples, known filtering techniques include percentage closer filtering or any similar high order filtering that composes multiple samples of image data together. For example, in bilinear filtering, conventional texture fetching pipelines sample up to four neighboring points for filtering. These samples are then blended together by using weights calculated from the sub-texel position of the sample point within a particular texel box, which is one of the four samples. Further, each of the samples comprises a vector having up to four channels designated typically as R, G, B, and A where R stands for red, G stands for green, B stands for blue, and A denotes alpha, which is typically a transparency value. The result of the filtering is a single vector having up to four channels where the single vector is a blend of the original four vectors (i.e., samples).

    [0003] There are instances where values of the four samples may be desirable to be used without bilinear filtering in order that custom operations may be performed within a shader in the texture pipeline. Example instances include Percentage Closer Filtering, which compares one channel of the sample with a provided distance and replaces it with a 0.0 or 1.0 value before performing the filtering, and higher order filters, which may require multiple fetches and changing of the blend weights before filtering. Conventional algorithms and accompanying logic typically obtain such values by performing four separate fetches for each of the samples being filtered. Four fetches comes from the fact that there are four components in a vector. There are four neighbors in a two dimensional surface. Filter algorithms usually use four samples, but many use a larger neighborhood, and in those cases several fetch four operations can be used to create the filter at four times the fetch speed compared to doing them individually. In any event, by performing four fetches per vector, the time needed to retrieve that sample data increased.

    [0004] A document in this technical field is GB 2 400 778A.

    SUMMARY OF THE INVENTION



    [0005] According to a first aspect of the present invention, there is provided a logic circuit comprising:

    selector logic configured to retrieve data from a plurality of pixels or texels, each pixel or texel of the respective plurality of pixels or texels having a plurality of pixel or texel channels and operable to select the pixel or texel channel data for a same pixel or texel channel from the plurality of pixels or texels respectively;

    combination logic configured to combine the selected pixel or texel channel data into a single vector, characterized in:
    wherein the single vector has a plurality of vector channels, and wherein the combination logic combines the selected pixel or texel channel data into the single color vector such that the data associated with each vector channel of the single vector corresponds to the pixel or texel channel data from the same pixel or texel channel of a different pixel or texel of the plurality of pixels or texels.



    [0006] According to a second aspect of the present invention, there is provided a method for combining pixel or texel information comprising:

    simultaneously sampling data from each of two or more adjacent pixels or texels wherein each adjacent pixel or texel has a plurality of pixel or texel channels;

    selecting the pixel or texel channel for a same pixel or texel channel from each of two or more adjacent pixels or texels;

    combining the selected pixel or texel channel data into a single color vector, characterized in : wherein the single vector has a plurality of vector channels, and wherein the combination logic combines the selected pixel or texel channel data onto the single color vector such that the data associated with each vector channel of the single vector corresponds to the pixel or texel channel data from the same pixel or texel channel of a different pixel or texel of the plurality of pixels or texels.


    BRIEF DESCRIPTION OF THE DRAWINGS



    [0007] 

    FIG. 1 illustrates a block diagram of an image processing system in accordance with the present disclosure.

    FIG. 2 illustrates a logic diagram illustrating sampling of a texel in accordance with the present disclosure.

    FIG. 3 illustrates another example of a logic diagram illustrating sampling in conjunction with a combination logic.

    FIG. 4 illustrates a method in accordance with the present disclosure.


    DETAILED DESCRIPTION OF THE PRESENT EXAMPLES



    [0008] The present disclosure discusses methods and apparatus for accomplishing the fetching or sampling of channels of pixels, such as but not limited to neighboring pixels or texels, in a simultaneous operation in order to achieve optimization of the performance of a pixel or texture pipeline. In particular, logic is disclosed including selector logic configured to retrieve data including a plurality of channels from each of a plurality of pixels, such as adjacent pixels or texels, non-neighboring pixels or texels or any suitable pixels or texels and is operable to select one channel from the plurality of channels of the data from each of the pixels or texels. The logic also includes combination logic configured to combine two or more of the selected channels into a single vector, such as an RGBA vector representing the color.

    [0009] The present disclosure also discloses a method for combining pixel or texel information including simultaneously sampling channel data from two or more pixels. The method further includes selecting a channel for each of the sample channel data from the two or more pixels or texels and then combining the plurality of selected channels into a single vector. By simultaneously sampling the data or fetching the data, the timing of filtering is optimized over the conventional methods and apparatus requiring four separate fetches.

    [0010] FIG. 1 illustrates an image processing system 100 including image processing hardware 102. The image processing hardware may comprise any number of devices including a graphics processing unit, another processing device utilized in a computer system, or a handheld device, such as a PDA or a mobile telephone as examples or in any other suitable device. Within the processing hardware 102 is pixel processing pipeline and in this particular example is shown to be a texture pipeline 104 that performs texturing of image data retrieved from a memory 106, as an example, for display on a display 108. Although described for illustration purposes only with respect to texel processing, the disclosed methods and apparatus may be employed using pixel information as well. It is noted that this display 108 may include any number of known devices for displaying image data including CRT's, LCD screens, other types of visual displays and printer devices. The texture pipeline 104 then delivers the processed image to the display device 108 via an output 109. Within the texture pipeline 104, the presently disclosed apparatus includes logic 110, such as in a texture fetching unit for example, that retrieves texel data from the memory 106 via a memory interface 112. Logic 110 includes selector logic 114 that is configured to receive the texel data (or pixel data), which includes a plurality of channels from each one of a plurality of texels, in this example adjacent texels stored in memory 106. The selector logic 114 is operable to select a single channel from the plurality of channels, which, in the exemplary embodiment, include RGBA channels. Logic 110 also includes combination logic 116 that is configured to combine two or more of the selected channels into a single vector, which is typically an RGBA vector. This vector may represent a color, for example.

    [0011] FIG. 2 illustrates a more detailed logic diagram of logic 110 of FIG. 1. As shown in the logic diagram 200, an array of texels 202 to be sampled includes at least two or more texels. As illustrated in FIG. 2 the array 202 includes four adjacent texels 204, 206, 208, and 210. Within the array 202 a texel sample point 212, which is the texel to be sampled, is shown. For purposes of this example, the texel sample point 212 is arbitrarily shown to fall within the top left texel 204, but could be anywhere within the four adjacent texels. Also any suitable plurality of texels or pixels whether adjacent, non-adjacent, neighboring or non-neighboring may be used.

    [0012] It is noted that each of the texels 204, 206, 208, and 210 include the four RGBA channels. A selector logic 214, corresponding to selector logic 114 in FIG. 1 samples a single channel from each of texels 204, 206, 208 and 210 as illustrated by connections 205, 207, 209, and 211. The selector logic which includes, for illustrative purposes, channel selects 216, 218, 220, or 222 configured to select a particular channel from each of the respective texels 204, 206, 208 and 210 to which they are coupled. For example, the selection logic 214 will choose to sample the R channels of each of texels 204, 206, 208 and 210 being delivered over lines 205, 207, 209, and 211.

    [0013] The selected channel, which is red in this example, is then output by the selector logic 214 as components of an RGBA vector as illustrated by lines 224, 226, 228 and 230. In other words, although the selection logic selects only red channels from each of the texels 204, 206, 208 and 210, the output of the selector logic represents the red channel of top left pixel 204 as a red (R) channel 224, the red channel of top right texel 206 as a green (G) channel 226, the red channel of bottom left texel 208 as blue (B) channel 230, and the red channel of texel 210 as the alpha (A) channel 228. This information is then delivered to combination logic 232, which corresponds to combination logic 116 in FIG. 1, in order to assemble the channels as a single RGBA color vector 234. This methodology saves time over conventional algorithms in that each sampling period yields a complete RGBA vector, whereas previously each of the RGBA channels from each texel were sampled and subsequently blended prior to delivering a blended color RGBA vector.

    [0014] FIG. 3 illustrates another example of a logic diagram 300 where the combination logic may be configured as a filter such as a bilinear filter or any other suitable filter. It is noted that within the typical texture pipeline, a bilinear filter is already included, thus the example of FIG. 3 utilizes typical existing logic in order to achieve the combination functionality without the addition of a distinct and additional separate combination logic. As illustrated, the texel array 302 of the adjacent texels is sampled by selector logic 312 in the same way as described with respect to FIG. 2. When the channels are delivered to the combination logic 329, which is a bilinear filter, the RGBA values, respectively 322, 324, 328 and 326 are delivered to linear blend logic 330 and 332. Input to these logic 330 and 332 are horizontal weights 334 and 336, which yield an output blend 338 or 340, respectively comprised of the top left channel and top right channel values and bottom left channel and bottom right channel values. Next the vertical blending is accomplished by linear blend 342 including the input of the vertical weight 344 to yield the single color vector 346 including the top left channel, top right channel, bottom left channel and bottom right channel.

    [0015] FIG. 4 illustrates an exemplary method performed by the apparatus illustrated in FIGS. 1-3. As illustrated, the flow diagram 400 begins at a start 402. Flow proceeds to block 404 where samples from adjacent texels are simultaneously sampled by the selection logic, as an example. After the channel data is sampled, flow proceeds to block 406 where a channel is selected for each of the texels sampled, such as the red channel R. Next flow proceeds to block 408 where the plurality of channels is combined into a single vector. This is performed, for example by the combination logic, discussed previously. Once the single color vector is achieved, the process ends at block 410. It is noted that this process 400 may be repeated for each of the different ones of the R, G, B, and A channels for each of the texels. That is, each of the remaining channels of the texels is sampled (e.g., the G channels are next sampled for each texel and a vector is produced, assuming the first sampled channel was the R channel, then the B channel for each texel and so on).

    [0016] As disclosed, the apparatus and methods discussed achieve optimization of the performance of a pixel pipeline or texture pipeline by fetching or sampling of channels of pixels such as but not limited to neighboring pixels (or texels) in a simultaneous operation and immediately combing the sampled channels into a vector that is subsequently output to a shader, for example. Thus, the presently disclosed apparatus and methods avoid having to sample each of the four channels of a pixel or texel one at a time before outputting a vector, thereby reducing the time required for performing filtering, such as percentage closer filtering, for example.

    [0017] The above detailed description of the present examples has been presented for the purposes of illustration and description only and not by limitation. It is therefore contemplated that the present application cover any additional modifications, variations, or equivalents but fall within the scope of the basic underlying principles disclosed above and the appended claims.


    Claims

    1. A logic circuit comprising:

    selector logic configured to select data from a plurality of pixels or texels, each pixel or texel of the respective plurality of pixels or texels having a plurality of pixel or texel channels and operable to select the pixel or texel channel data for a same pixel or texel channel from the plurality of pixels or texels respectively; and

    combination logic;

    characterized in:

    the combination logic being configured to combine the selected pixel or texel channel data into a single color vector,

    wherein the single color vector has a plurality of vector channels, and wherein the combination logic combines the selected pixel or texel channel data into the single color vector such that the data associated with each vector channel of the single color vector corresponds to the pixel or texel channel data from the same pixel or texel channel of a different pixel or texel of the plurality of pixels or texels.


     
    2. The logic circuit as defined in claim 1, wherein the combination logic includes a filter.
     
    3. The logic circuit as defined in claim 2, wherein the combination logic includes-a bilinear filter.
     
    4. The logic circuit as defined in any one of the preceding claims, wherein the combination logic includes a multiplexer configured to combine the pixel or texel data into the single color vector.
     
    5. The logic circuit as defined in any one of the preceding claims, wherein the plurality of the said one of pixels or texels includes four neighboring said one of pixels or texels.
     
    6. The logic circuit according to any one of the preceding claims, incorporated into a texture pipeline.
     
    7. The texture pipeline according to claim 6, incorporated into an image processing circuit.
     
    8. A method for combining pixel or texel information comprising:

    simultaneously sampling data from each of two or more adjacent pixels or texels wherein each adjacent pixel or texel has a plurality of pixel or texel channels;

    selecting the pixel or texel channel for a same pixel or texel channel from each of two or more adjacent pixels or texels;

    characterized in:

    the method further comprising combining the selected pixel or texel channel data into a single color vector,

    wherein the single color vector has a plurality of vector channels, and wherein the combination logic combines the selected pixel or texel channel data into the single color vector such that the data associated with each vector channel of the single color vector corresponds to the pixel or texel channel data from the same pixel or texel channel of a different pixel or texel of the plurality of pixels or texels.


     
    9. The method as defined in claim 8, wherein combining the plurality of selected channels into a single color vector is performed with a filter.
     
    10. The method as defined in claim 9, wherein combining the selected data into the single color vector is performed with a bilinear filter.
     
    11. The method as defined in any one of claims 8 to 10, wherein combining the pixel or texel channel data into the single color vector includes multiplexing the pixel or texel channel data into the single color vector.
     
    12. The method as defined in any one of claims 8 to 11, wherein the two or more adjacent pixels or texels includes four neighboring pixels or texels.
     


    Ansprüche

    1. Logikschaltung, umfassend:

    eine Auswahllogik, die dazu konfiguriert ist, Daten aus einer Vielzahl von Pixeln oder Texeln auszuwählen, wobei jedes Pixel oder Texel der jeweiligen Vielzahl von Pixeln oder Texeln eine Vielzahl von Pixel- oder Texelkanälen aufweist und betrieben werden kann, um die Pixel- oder Texelkanaldaten für einen gleichen Pixel- oder Texelkanal jeweils aus der Vielzahl von Pixeln oder Texeln auszuwählen; und

    eine Kombinationslogik;

    dadurch gekennzeichnet, dass:

    die Kombinationslogik dazu konfiguriert ist, die ausgewählten Pixel- oder Texelkanaldaten zu einem einzelnen Farbvektor zu kombinieren,

    wobei der einzelne Farbvektor eine Vielzahl von Vektorkanälen aufweist und wobei die Kombinationslogik die ausgewählten Pixel- oder Texelkanaldaten derart zu dem einzelnen Farbvektor kombiniert, dass die Daten, die jedem Vektorkanal des einzelnen Farbvektors zugeordnet sind, den Pixel- oder Texelkanaldaten aus dem gleichen Pixel- oder Texelkanal eines unterschiedlichen Pixels oder Texels der Vielzahl von Pixeln oder Texeln entsprechen.


     
    2. Logikschaltung nach Anspruch 1, wobei die Kombinationslogik einen Filter beinhaltet.
     
    3. Logikschaltung nach Anspruch 2, wobei die Kombinationslogik einen bilinearen Filter beinhaltet.
     
    4. Logikschaltung nach einem der vorhergehenden Ansprüche, wobei die Kombinationslogik einen Multiplexer beinhaltet, der dazu konfiguriert ist, die Pixel- oder Texeldaten in dem einzelnen Farbvektor zu kombinieren.
     
    5. Logikschaltung nach einem der vorhergehenden Ansprüche, wobei die Vielzahl des einen von Pixeln oder Texeln vier beinhaltet, die an den einen von Pixeln und Texeln angrenzen.
     
    6. Logikschaltung nach einem der vorhergehenden Ansprüche, die in eine Textur-Pipeline integriert ist.
     
    7. Textur-Pipeline nach Anspruch 6, die in eine Bildverarbeitungsschaltung integriert ist.
     
    8. Verfahren zum Kombinieren von Pixel- oder Texelinformationen, umfassend:

    gleichzeitiges Abtasten von Daten von jedem von zwei oder mehreren benachbarten Pixeln oder Texeln, wobei jedes benachbarte Pixel oder Texel eine Vielzahl von Pixel- oder Texelkanälen aufweist;

    Auswählen des Pixel- oder Texelkanals für einen gleichen Pixel- oder Texelkanal aus jedem von zwei oder mehreren benachbarten Pixeln oder Texeln;

    dadurch gekennzeichnet, dass:

    das Verfahren ferner das Kombinieren der ausgewählten Pixel- oder Texelkanaldaten zu einem einzelnen Farbvektor umfasst,

    wobei der einzelne Farbvektor eine Vielzahl von Vektorkanälen aufweist und wobei die Kombinationslogik die ausgewählten Pixel- oder Texelkanaldaten derart zu dem einzelnen Farbvektor kombiniert, dass die Daten, die jedem Vektorkanal des einzelnen Farbvektors zugeordnet sind, den Pixel- oder Texelkanaldaten aus dem gleichen Pixel- oder Texelkanal eines unterschiedlichen Pixels oder Texels der Vielzahl von Pixeln oder Texeln entsprechen.


     
    9. Verfahren nach Anspruch 8, wobei das Kombinieren der Vielzahl von ausgewählten Kanälen zu einem einzelnen Farbvektor mit einem Filter durchgeführt wird.
     
    10. Verfahren nach Anspruch 9, wobei das Kombinieren der ausgewählten Daten zu dem einzelnen Farbvektor mit einem bilinearen Filter durchgeführt wird.
     
    11. Verfahren nach einem der Ansprüche 8 bis 10, wobei das Kombinieren der Pixel- oder Texelkanaldaten zu dem einzelnen Farbvektor das Multiplexen der Pixel- oder Texelkanaldaten zu dem einzelnen Farbvektor beinhaltet.
     
    12. Verfahren nach einem der Ansprüche 8 bis 11, wobei die zwei oder mehreren benachbarten Pixel oder Texel vier angrenzende Pixel oder Texel beinhaltet.
     


    Revendications

    1. Circuit logique comprenant :

    une logique de sélecteur configurée pour sélectionner des données provenant d'une pluralité de pixels ou de texels, chaque pixel ou texel de la pluralité respective de pixels ou de texels ayant une pluralité de canaux de pixels ou de texels et étant utilisable pour sélectionner les données de canal de pixel ou de texel pour un même canal de pixel ou de texel de la pluralité de pixels ou de texels respectivement ; et

    une logique combinatoire ;

    caractérisé en ce que :

    la logique combinatoire est configurée pour combiner les données de canal de pixel ou de texel sélectionnées dans un vecteur de couleur unique,

    dans lequel le vecteur de couleur unique possède une pluralité de canaux de vecteur, et dans lequel la logique combinatoire combine les données de canal de pixel ou de texel sélectionnées dans le vecteur de couleur unique de telle sorte que les données associées avec chaque canal de vecteur du vecteur de couleur unique correspondent aux données de canal de pixel ou de texel du même canal de pixel ou de texel d'un pixel ou d'un texel différent de la pluralité de pixels ou de texels.


     
    2. Circuit logique selon la revendication 1, dans lequel la logique combinatoire comprend un filtre.
     
    3. Circuit logique selon la revendication 2, dans lequel la logique combinatoire comprend un filtre bilinéaire.
     
    4. Circuit logique selon l'une quelconque des revendications précédentes, dans lequel la logique combinatoire comprend un multiplexeur configuré pour combiner les données de pixel ou de texel dans le vecteur de couleur unique.
     
    5. Circuit logique selon l'une quelconque des revendications précédentes, dans lequel la pluralité desdits l'un des pixels ou des texels comprend quatre desdits l'un des pixels ou des texels voisins.
     
    6. Circuit logique selon l'une quelconque des revendications précédentes, incorporé dans un pipeline de texture.
     
    7. Pipeline de texture selon la revendication 6, incorporé dans un circuit de traitement d'image.
     
    8. Procédé pour combiner des informations de pixel ou de texel comprenant :

    l'échantillonnage simultané de données provenant de chacun de deux pixels ou texels adjacents ou plus, dans lequel chaque pixel ou texel adjacent possède une pluralité de canaux de pixel ou de texel ;

    la sélection du canal de pixel ou de texel pour un même canal de pixel ou de texel parmi chacun de deux pixels ou texels adjacents ou plus ;

    caractérisé en ce que :

    le procédé comprend en outre la combinaison des données de canal de pixel ou de texel sélectionnées dans un vecteur de couleur unique,

    dans lequel le vecteur de couleur unique possède une pluralité de canaux de vecteur, et dans lequel la logique combinatoire combine les données de canal de pixel ou de texel sélectionnées dans le vecteur de couleur unique de telle sorte que les données associées à chaque canal de vecteur du vecteur de couleur unique correspondent aux données de canal de pixel ou de texel provenant du même canal de pixel ou de texel d'un pixel ou d'un texel différent de la pluralité de pixels ou de texels.


     
    9. Procédé selon la revendication 8, dans lequel la combinaison de la pluralité de canaux sélectionnés dans un vecteur de couleur unique est réalisée avec un filtre.
     
    10. Procédé selon la revendication 9, dans lequel la combinaison des données sélectionnés dans le vecteur de couleur unique est réalisée avec un filtre bilinéaire.
     
    11. Procédé selon l'une quelconque des revendications 8 à 10, dans lequel la combinaison des données de canal de pixel ou de texel dans le vecteur de couleur unique inclut le multiplexage des données de canal de pixel ou de texel dans le vecteur de couleur unique.
     
    12. Procédé selon l'une quelconque des revendications 8 à 11, dans lequel les deux pixels ou texels adjacents ou plus comprennent quatre pixels ou texels voisins.
     




    Drawing

















    Cited references

    REFERENCES CITED IN THE DESCRIPTION



    This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

    Patent documents cited in the description