(19)
(11)EP 1 935 015 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
27.05.2015 Bulletin 2015/22

(21)Application number: 06810689.7

(22)Date of filing:  21.09.2006
(51)International Patent Classification (IPC): 
H01L 27/01(2006.01)
H01L 23/522(2006.01)
(86)International application number:
PCT/JP2006/319231
(87)International publication number:
WO 2007/043340 (19.04.2007 Gazette  2007/16)

(54)

SEMICONDUCTOR DEVICE

HALBLEITERBAUELEMENT

DISPOSITIF SEMI-CONDUCTEUR


(84)Designated Contracting States:
DE FR GB

(30)Priority: 14.10.2005 JP 2005299767

(43)Date of publication of application:
25.06.2008 Bulletin 2008/26

(73)Proprietor: Ricoh Electronic Devices Co., Ltd.
Ikeda-shi, Osaka 563-8501 (JP)

(72)Inventors:
  • YAMASHITA, Kimihiko
    Kobe-shi, Hyogo 651-2244 (JP)
  • HASHIMOTO, Yasunori
    Miki-shi, Hyogo 673-1117 (JP)

(74)Representative: Leeming, John Gerard et al
J A Kemp 14 South Square Gray's Inn
London WC1R 5JJ
London WC1R 5JJ (GB)


(56)References cited: : 
EP-A1- 0 698 923
JP-A- 10 078 826
US-A1- 2005 218 478
EP-A2- 0 741 410
JP-A- 63 040 344
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    TECHNICAL FIELD



    [0001] The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device having a structure where a lower layer side insulation film, a wiring pattern formed on the lower layer side insulation film, a base insulation film formed on the lower layer side insulation film and the wiring pattern, and plural metal thin film resistance elements formed on the base insulation film are provided; a connection hole is formed in the base insulation film on the wiring pattern; and the wiring pattern and the metal thin film resistance element are electrically connected in the connection hole.

    BACKGROUND ART



    [0002] In analog integrated circuits, resistance elements are frequently used as important elements. Recently, a resistance element formed by a metal thin film (hereinafter "metal thin film resistance element") in the resistance elements has attracted attention because the metal thin film resistance element has a low TCR (temperature coefficient of resistance) of a resistance value. For example, chrome silicon (CRSI), nickel chrome (NICR), tantalum nitride (TAN), chrome silicide (CRSI2), chrome silicide nitride (CRSIN), chrome silicon oxide (CRSI0), or the like is used as a material of the metal thin film resistance element.

    [0003] In a semiconductor device having the metal thin film resistance element, in order to meet the demand of high integration, the metal thin film resistance element may be frequently formed by a thin film having a thickness equal to or less than 100 nm (1000 Å) so that a high sheet resistance is obtained.

    [0004] In the related art, as a method for making electric connection of such a metal thin film resistance element, a method whereby a wiring pattern is formed on a lower layer side insulation film; a base insulation film is formed on the wiring pattern; a connection hole is formed in the base insulation film on the wiring patter; and the metal thin film resistance element is formed in the connection hole and on the base insulation film, has been used. See, for example, Japanese Laid-Open Patent Application Publication No. 2002-124639.

    [0005] A related art semiconductor device is discussed with reference to FIG. 1 and FIG. 2. Here, FIG. 1 is a view showing the related art semiconductor device, more specifically, FIG. 1(A) is a plan view of the related art semiconductor device; FIG. 1(B) is a cross-sectional view taken along a line A-A of FIG. 1(A); and FIG. 1(C) is a cross-sectional view taken along a line B-B of FIG. 1(A). FIG. 2 is an equivalent circuit of FIG. 1(A).

    [0006] Referring to FIG. 1 and FIG. 2, an interlayer insulation layer 5 is formed on an element isolation oxide film 3 formed on a silicon substrate 1. A metal wiring pattern 7 is formed on the interlayer insulation layer 5. A base insulation film 9 is formed on an entire surface of the interlayer insulation layer 5 including the metal wiring pattern 7.

    [0007] A connection hole 45 is formed in the base insulation film 9 on the metal wiring pattern 7. A metal think film resistance element 47 is formed on the base insulation film 9 including a forming area of the connection hole 45.

    [0008] A passivation film 15 is formed on the base insulation film 9 including a forming area of the metal think film resistance element 47 as a final protection film.

    [0009] As shown in FIG. 1(B), a lower surface of the metal thin film resistance 47 is electrically connected to the metal wiring pattern 7 in the connection hole 45.

    [0010] In addition, as shown in FIG. 1(A), plural metal thin film resistance elements 47 are connected in series via the metal wiring patterns 7.

    [0011] The metal thin film resistance elements 47 form a unit resistance. This unit resistance is prepared in various connection ways such as a block of' a series connection or a parallel connection of one metal thin film resistance element, two metal thin film resistance elements, four metal thin film resistance elements, eight metal thin film resistance elements, sixteen metal thin film resistance elements, thirty two metal thin film resistance elements, sixty four metal thin film resistance element and so on. A single or plural of these blocks are connected so that a splitting resistance circuit or the like necessary for the circuit is formed.

    [0012] In the examples shown in FIG. 1 and Fig. 2, the metal thin film resistance elements 47 of a single resistance R1, two resistances R2, and four resistances R3 are connected in series and the resistances R1, R2, and R3 are connected in series. When a voltage is applied between electrodes A through D, voltages corresponding to a resistance ratio of electrodes B and C are output.

    [0013] According to a connection method shown in FIG. 1, a substantial resistance value including resistance of an electrode per se, contact resistance of the electrode and the metal thin film resistance element, or the like substantially follows the number of the metal thin film resistance elements. Therefore, it is possible to easily design and avoid unevenness of resistance values.

    [0014] Meanwhile, the analog integrated circuit requires a lay-out using a metal thin film resistance element having width as narrow as possible so that a large number of the metal thin film resistances are arranged. Therefore, the metal thin film resistance element is formed in an area close to the minimum resistance element pattern width that can be formed by a semiconductor process for manufacturing the analog integrated circuit.

    [0015] However, in a case where a hole for connecting or an electrode is formed by the metal thin film resistance element whose lay-out is made in the vicinity of the minimum width, if a sufficient space of overlapping between the connection hole and the metal thin film resistance element is necessary, the connection hole may not be received in the width of a single metal thin film resistance element due to the size of the connection hole formed by a minimum size of the same process rule.

    [0016] There are generally two methods as discussed below to correspond to this case.
    1. (1) Only the connection hole forming part of the metal thin film resistance element is made wide. US 2005/0218478 D1 depicts a device having this arrangement.
    2. (2) As shown in FIG. 3, the structure where a single metal thin film resistance element 47 is connected as the unit resistance is not applied, but a meandering metal thin film resistance element is formed by connecting two belt shape parts 47a with a turning part 47b, and a connection hole 45a and the metal wiring pattern 7 are arranged under the turning part 47b. Here, FIG. 3 is a plan view showing another related art semiconductor device.


    [0017] In the case of the above-mentioned (1), since the metal thin film resistance element of the connection hole part is wide, the area of the lay-out of the metal thin film resistance element is increased.

    [0018] On the other hand, in the case of the above-mentioned (2), since the connection hole 45a is arranged under the turning part 47b connected to two belt shape parts 47a, it is possible to make the connection hole 45a larger than the width of the belt shape part 47a without increasing the lay-out area.

    [0019] In addition, since the connection hole 45a and the metal wiring pattern 7 are provided at both ends of a single belt shape part 47a, the resistance values corresponding to the number of the belt shape parts 47a may be easily obtained.

    [0020] However, in the lay-out of the above-mentioned (2), as shown by an arrow in FIG. 3, at the turning part 47b of the metal thin film resistance element, the electrical current flows not to the connection hole 45a or the metal wiring pattern 7 but via an overlapping space part. For example, at extended parts such as the electrodes A through D, an electric current flows via the connection hole and the electrode part and therefore a designated resistance value or resistance ratio is not obtained. Such a problem may occur more frequently as the number of the belt shape part 47a and the turning part 47b connected in series is increased.

    DISCLOSURE OF THE INVENTION



    [0021] Accordingly, embodiments of the present invention may provide a novel and useful semiconductor device in which the above-mentioned problems are eliminated.

    [0022] More specifically, the embodiments of the present invention may provide a semiconductor device having an integrated circuit including a metal thin film resistance element wherein a resistance value that is the same as a design value can be obtained without increasing a lay-out area of the metal thin film resistance element.

    [0023] One aspect of the present invention may be to provide a semiconductor device, including: a lower layer side insulation film; a wiring pattern formed on the lower layer side insulation film; a base insulation film formed on the lower layer side insulation film and the wiring pattern; and a plurality of metal thin film resistance elements formed on the base insulation film; wherein a connection hole is formed in the base insulation film on the wiring pattern; the wiring pattern and the metal thin film resistance element are electrically connected in the connection hole; the metal thin film resistance element has a belt shape part arranged separately from the connection hole and a connection part continuously formed with the belt shape part and connected to the wiring pattern in the connection hole; and the connection parts of at least two of the metal thin film resistance elements are formed in a common connection hole with a gap between said connection parts.

    [0024] According to the above-mentioned semiconductor device, it is possible to make the connection hole larger than the width of the belt shape part and therefore an area of the lay-out is not increased.

    [0025] As a result of this, it is possible to make lay-out of the metal thin film resistance elements without limiting the size of the connection hole. Hence, it is possible to make the area of the lay-out small and a chip size small.

    [0026] In addition, since plural connection parts formed in a single connection hole are formed with a gap in between, electrical current flows via the wiring pattern if plural metal thin film resistance elements are connected in series. Therefore, in the embodiment of the present invention, unlike the related art shown in FIG. 3, the electrical current does not flow via the turning part 47b so that a designated resistance value is obtained and an analog circuit having high precision can be designed.

    [0027] In the semiconductor device, the connection part may be wider than the belt shape part.

    [0028] According to the above-mentioned semiconductor device, it is possible to make a space of overlapping of the connection part and the connection hole large.

    [0029] In the semiconductor device, the gap between the connection parts neighboring in the connection hole may be narrower than a gap between neighboring belt shape parts.

    [0030] According to the above-mentioned semiconductor device, as compared with a case where the gap between the neighboring connection parts is the same as the gap between the neighboring belt-shape parts, it is possible to make a contact area of the metal thin film and the wiring pattern larger so that the contact resistance can be reduced.

    [0031] The semiconductor device may further include a first connection part made of a metal thin film whose material is the same as the material of the metal thin film resistance element, which first connection part is configured to connect the connection parts neighboring in the connection hole.

    [0032] According to the above-mentioned semiconductor device, it is possible to make a contact area of the metal thin film and the wiring pattern larger so that the contact resistance can be reduced.

    [0033] The semiconductor device may further include a second connection part made of a metal thin film whose material is the same as the material of the metal thin film resistance element, which second connection part is configured to connect the connection parts neighboring outside the connection hole at a side opposite to the belt shape part from the connection hole.

    [0034] According to the above-mentioned semiconductor device, it is possible to reduce influence where the end part of the connection part is curved due to properties of photo engraving so that the width of the overlapping part can be made large.

    [0035] One aspect of the present invention may be to provide a semiconductor device, including: a splitting resistance circuit configured to obtain high precision of a voltage output by splitting the voltage output with a plurality of resistance elements and adjusting the voltage output by cutting a fuse element; wherein the resistance element is formed by the metal thin film resistance element mentioned above.

    [0036] According to the above-mentioned semiconductor device, it is possible to make the resistance value of the resistance element stable by using the metal thin film resistance elements forming the semiconductor device of the embodiment of the present invention. Therefore, it is possible to improve precision of output voltage of a splitting resistance circuit.

    [0037] One aspect of the present invention may be to provide a semiconductor device, including: a first splitting resistance circuit configured to split an input voltage and supply a split voltage; a standard voltage generation circuit configured to supply a standard voltage; and a voltage detection circuit having a comparison circuit configured to compare the split voltage from the first splitting resistance circuit and the standard voltage from the standard voltage generation circuit; wherein the first splitting resistance circuit has the splitting resistance circuit mentioned above.

    [0038] According to the above-mentioned semiconductor device, it is possible to improve precision of the output voltage by the splitting resistance circuit where the present invention is applied. Therefore, it is possible to improve the precision of voltage detection of the voltage detection circuit.

    [0039] One aspect of the present invention may be to provide a semiconductor device, including: an output driver configured to control output of an input voltage; a first splitting resistance circuit configured to split an output voltage and supply a split voltage; a standard voltage generation circuit configured to supply a standard voltage; and a constant voltage generation circuit having a comparison circuit configured to compare the split voltage from the first splitting resistance circuit and the standard voltage from the standard voltage generation circuit; wherein the first splitting resistance circuit has the splitting resistance circuit mentioned above.

    [0040] According to the above-mentioned semiconductor device, it is possible to improve the precision of the output voltage by the splitting the resistance circuit where the present invention is applied. Therefore, it is possible to make output voltage of the constant voltage generation circuit stable.

    [0041] Other objects, features, and advantages of the present invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings.

    BRIEF DESCRIPTION OF THE DRAWINGS



    [0042] 

    FIG. 1 is a view showing a related art semiconductor device, more specifically, FIG. 1(A) is a plan view of the related art semiconductor device; FIG. 1(B) is a cross-sectional view taken along a line A-A of FIG. 1(A); and FIG. 1(C) is a cross- sectional view taken along a line B-B of FIG. 1(A);

    FIG. 2 is an equivalent circuit of FIG. 1(A), FIG. 3 and FIG. 4(A);

    FIG. 3 is a plan view showing another related art semiconductor device;

    FIG. 4 is a view showing a semiconductor device of an embodiment of the present invention, more specifically, FIG. 4(A) is a plan view showing a part of a forming area of a metal thin film resistance element; FIG. 4(B) is a cross-sectional view taken along a line A-A of FIG. 4(A); and FIG. 4(C) is a cross- sectional view taken along a line B-B of FIG. 4(A);

    FIG. 5 is a plan view showing the vicinity of a connection hole of other embodiments of the present invention;

    FIG. 6 is a plan view showing the vicinity of a connection hole of other embodiment of the present invention;

    FIG. 7 is a circuit diagram showing an example of a semiconductor device having a constant voltage generation circuit that is an analog circuit;

    FIG. 8 is a circuit diagram showing an example of a semiconductor device having a voltage generation circuit that is an analog circuit;

    FIG. 9 is a circuit diagram showing an example of a semiconductor device having a splitting resistance circuit that is an analog circuit;

    FIG. 10 is a lay-out view of an example of a lay-put of a fuse element part of the splitting resistance circuit; and

    FIG. 11 is a graph showing an output voltage distribution after trimming in plural samples of the constant voltage generation circuit where the present invention is applied, more specifically, FIG. 11(A) is a graph in a case of the present invention and FIG. 11(B) is a graph of a comparison example wherein the vertical axis shows frequency and the horizontal axis shows an output voltage.


    BEST MODE FOR CARRYING OUT THE INVENTION



    [0043] A description of the present invention is now given, with reference to FIG. 4 through FIG. 11, including embodiments of the present invention.

    [0044] FIG. 4 is a view showing a semiconductor device of an embodiment of the present invention. More specifically, FIG. 4(A) is a plan view showing a part of a forming area of a metal thin film resistance element; FIG. 4(B) is a cross-sectional view taken along a line A-A of FIG. 4(A); and FIG. 4(C) is a cross-sectional view taken along a line B-B of FIG. 4(A).

    [0045] In FIG. 4(A), illustrations of a base insulation film and a passivation film are omitted. In the embodiment discussed below, while a transistor element, a capacitor element, or the like is formed on the same substrate, illustration of these elements is omitted in drawings.

    [0046] An equivalent circuit of this embodiment is the same as the circuit shown in FIG. 2.

    [0047] In this embodiment, an element isolation oxidization film 3 is formed on a silicon substrate 1. An interlayer insulation film (lower layer side insulation film) 5 is formed on the element isolation oxidization film 3 formed on the silicon substrate 1.

    [0048] The interlayer insulation film 5 is made of a BPSG (Borophospho Silicate Glass) film or a PSG (Phospho Silicate Glass) film. A metal wiring pattern 7 is formed on the interlayer insulation film 5. The metal wiring pattern is formed by, for example, an AlSiCu (Cu = 0.5 %, Si = 1.0 %) film.

    [0049] A base insulation film 9 is formed on the interlayer insulation film 5 including a forming area of the metal wiring pattern 7. The base.insulation film 9 is formed by, for example, from a lower layer side, a plasma CVD (Chemical Vapor Deposition) oxidization film and a SOG (Spin On Glass) layer. These layers are illustrated in a body in FIG. 4. The thickness of the base insulation film 9 is, for example, approximately 650 nm (6500 Å).

    [0050] A connection hole 11 is formed in the base insulation film 9 so as to correspond to a connection part of a metal thin film resistance element and the metal wiring pattern 7. The connection hole 11 has measurement of, for example, approximately 2.6 X 1.4 µm.

    [0051] A CrSiN thin film resistance element (metal thin film resistance element) 13 is formed on the base insulation film 9 including a forming area of the connection hole 11. The CrSiN thin film resistance element 13 includes a band shape part 13a and connection parts 13b provided at both ends of the band shape part 13a.

    [0052] The band shape part 13a is arranged so as to be separated from the connection hole 11. The connection part 13b is formed from the end part of the band shape part 13a into the connection hole 11. In the connection hole 11, the connection part 13b is electrically connected to the metal wiring pattern 7. In a single connection hole 11, the connection parts 13b of two CrSiN thin film resistance resistances 13 are formed with a gap in between.

    [0053] The film thickness of the CrSiN thin film resistance element 13 is, for example, approximately 8 nm (80Å). The CrSiN thin film resistance element 13 is formed by a target of Si/Cr = 60 / 40 wt% under a condition of N2 partial pressure = 20 %. The width of the CrSiN thin film resistance element 13 is, for example, approximately 1.2 µm. The gap between neighboring CrSiN thin film resistance elements 13 is, for example, approximately 1.0 µm.

    [0054] A passivation film 15 as a final protection film is formed on the base insulation film 9 including a forming area of the CrSiN thin film resistance element 13. The passivation film 15 is formed by, for example, a silicon oxide film situated at a lower layer side and a silicon nitride layer situated at an upper layer side. These layers are illustrated in a body in FIG. 4.

    [0055] Thus, in this embodiment, the CrSiN thin film resistance element 13 includes the belt shape part 13a arranged separately from the connection hole 11 and the connection part 13b continuously formed with the belt shape part 13a and connected to the metal wiring pattern 7. In addition, the connection parts 13b of two CrSiN thin film, resistance elements 13 are formed with a gap in between in a single connection hole 11.

    [0056] Therefore, the connection hole 11 can be larger than the width of the belt shape part 13a and therefore the area of the lay-out is not increased. Because of this, since the lay-out of the CrSiN thin film resistance element 13 can be made without limiting the size of the connection hole 11, it is possible to make the area of the lay-out small so that the chip size can be made small.

    [0057] In addition, since two connection parts 11a formed in a single connection hole 11 are formed with a gap in between, an electrical current flows via the wiring pattern 7 when plural metal thin film resistance elements 13 are connected in series.

    [0058] Accordingly, in this embodiment unlike the related art shown in FIG. 3, the electrical current does not flow via the turning part 47b so that a designated resistance value is obtained and an analog circuit having high precision can be designed.

    [0059] FIG. 5 is a plan view showing the vicinity of a connection hole of other embodiments of the present invention;

    [0060] In an example shown in FIG. 5(A), the width of the connection part 13b is greater than the width of the belt shape part 13a so that the gap between the connection parts 13b neighboring in the connection hole 11 is narrower than the gap between the belt shape parts 13a neighboring the connection hole 11.

    [0061] According to the example shown in FIG. 5(A), as compared to a case where the gap between the connection parts 13b neighboring in the connection hole 11 is the same as the gap between the belt shape parts 13a neighboring the connection hole 11, it is possible to make a contact area of the connection part 13b and the wiring pattern 7 larger so that contact resistance can be reduced.

    [0062] In addition, since the width of the connection part 13b is greater than the width of the belt shape part 13a, it is possible to make an overlapping space of the connection part 13b and the connection hole 11.

    [0063] In an example shown in FIG. 5(B), a side in a longitudinal direction of the connection part 13b and not overlapping the connection hole 11 is extended to the outside, namely in a direction opposite to the connection hole 11 so that the connection part 13b is wider than the belt shape part 13a.

    [0064] According to the example shown in FIG. 5(B), it is possible to make the overlapping space of the connection part 13b and the connection hole 11 large.

    [0065] In an example shown in FIG. 5(C), a configuration of the connection part 13b is formed by combining the configuration of the connection part 13b in the example shown in FIG. 5(A) and the configuration of the connection part 13b in the example shown in FIG. 5(B).

    [0066] According to the example shown in FIG. 5(C), it is possible to realize a decrease of the contact resistance and an increase of the overlapping space of the connection part 13b and the connection hole 11.

    [0067] In an example shown in FIG. 5(D), not forming part of the present invention, a first connection part 13c and a second connection part 13d are provided. The first connection part 13c connects connection parts 13b neighboring in the connection hole 11. The second connection part 13d connects connection parts 13b neighboring outside of the connection hole 11 at a side opposite to the belt shape part 13a from the connection hole 11.

    [0068] The first connection part 13c and the second connection part 13d are made of a metal thin film whose material is the same as that of the CrSiN thin film resistance element 13, namely CrSiN.

    [0069] According to the example shown in FIG. 5(D), it is possible to make the contact area of the metal thin film and the wiring pattern 7 large by the first connection part 13c so that contact resistance can be reduced.

    [0070] In addition, it is possible to reduce influence where the end part of the connection part 13b is curved due to properties of photo engraving by the second connection part 13d so that width of the overlapping part can be made large.

    [0071] In an example shown in FIG. 5(E) as compared to the example shown in FIG. 5(D), the connection part 13c is formed so as to retreat from the belt shape part 13a.

    [0072] According to the example shown in FIG. 5(E), even if an overlapping shift is generated in a longitudinal direction of the belt shape part 13a, it is possible to prevent the belt shape parts 13a from being connected by the connection part 13c at a belt shape part 13a side of the connection hole 11.

    [0073] In an example shown in FIG. 5(F) as compared to the example shown in FIG. 5(D), the connection part 13c is not formed.

    [0074] According to the example shown in FIG. 5(F), it is possible to reduce influence where the end part of the connection part 13b is curved due to properties of photo engraving by the second connection part 13d so that width of the overlapping part can be made large.

    [0075] In an example shown in FIG. 5(G) as compared to the example shown in FIG. 5(E), the second connection part 13d is not formed.

    [0076] According to the example shown in FIG. 5(G), it is possible to make the contact area of the metal thin film and the wiring pattern 7 large by the first connection part 13c so that contact resistance can be reduced.

    [0077] In the example shown in FIG. 5(G) as well as the example shown in FIG. 5(D), the connection part 13c may be formed to be the same size as that of the connection hole 11 in a longitudinal direction of the belt shape part 13a. However, considering an overlapping space, it is preferable that at least an end part at a side of the belt shape part 13a be formed so as to retract from the connection part 13c.

    [0078] In addition, in the examples shown in FIG. 5(D), FIG. 5(E), FIG. 5(F) and FIG. 5(G) as well as the examples shown in FIG. 5(A), FIG. 5(B), and FIG. 5(C), line width of the connection part 13b may be greater than the belt shape part 13a so as to have the same effect as that of the examples shown in FIG. 5(A), FIG. 5(B), and FIG. 5(C).

    [0079] In the above-discussed embodiment, two connection parts 13b are formed in a single connection hole 11. However, the present invention is not limited to this. The number of the connection parts of the metal thin film resistance element formed in a single connection hole may be equal to or greater than three.

    [0080] For example, as shown in FIG. 6, three connection parts 13b may be formed in a single connection hole 11. Here, FIG. 6 is a plan view showing the vicinity of a connection hole of another embodiment of the present invention.

    [0081] In a case where the number of the connection parts of the metal thin film resistance element formed in a single connection hole is equal to or greater than three, the linear width of the connection part 13 may be wide as shown in FIG. 5(A), FIG. 5(B) and FIG. 5(C); the connection parts 13c and 13d may be provided as shown in FIG. 5(D), FIG. 5(E), FIG. 5(F) and FIG. 5(G); or they may be combined.

    [0082] In the above-discussed embodiment, the passivation film 15 is formed on the CrSiN thin film resistance element 13. However, the present invention is not limited to this. The insulation film formed on the CrSiN thin film resistance element 13 may be any insulation film such as an interlayer insulation film for forming a metal wiring pattern of a second layer.

    [0083] In the above-discussed embodiment, the present invention is applied to the semiconductor device having a single layer of the metal wiring pattern. However, the present invention is not limited to this. The present invention may be applied to a semiconductor device with a multilayer metal wiring structure having two or more layers of the metal wiring patterns. In this case, in order to obtain electrical connection of the metal thin film resistance element, the metal wiring of a lower layer of the metal thin film resistance element may be a metal wiring pattern of any layer.

    [0084] In the above-discussed embodiment, a metal material pattern 7 is used as a wiring pattern for making electrical connection of the CrSiN thin film resistance element. However, the present invention is not limited to this. For example, a wiring pattern made of other metal material or a polysilicon wiring pattern made of polysilicon may be used.

    [0085] In the above-discussed embodiment, CrSiN is used as the material of the metal thin film resistance element. However, the present invention is not limited to this. Other material such as NiCr, TaN, CrSi2, CrSi, or CrSiO may be used as the material of the metal thin film resistance element.

    [0086] The metal thin film resistance element forming the semiconductor device of the embodiment of the present invention can be applied to a semiconductor device having, for example, an analog circuit. In the following description, an example of a semiconductor device having an analog circuit including the metal thin film resistance element of the embodiment of the present invention is discussed.

    [0087] FIG. 7 is a circuit diagram showing an example of a semiconductor device having a constant voltage generation circuit that is an analog circuit.

    [0088] Referring to FIG. 7, a constant voltage generation circuit 25 is provided so as to stably supply electric power from a DC (direct current) power supply 21 to a load 23. The constant voltage generation circuit 25 includes an input terminal (Vbat) 27 where the DC power supply 21 is connected, a standard voltage generation circuit (Vref) 29, an operational amplifier (comparison circuit) 31, a P channel MOS transistor (hereinafter "PMOS") 33 forming an output driver, splitting resistance elements R1 and R2, and an output terminal (Vout) 35.

    [0089] In the operational amplifier 31 of the constant voltage generation circuit 25, the following control is implemented. That is, the output terminal is connected to a gate electrode of the PMOS 33; a standard voltage Vref is applied from the standard voltage generation circuit 29 to an inversing input terminal (-); and a voltage produced by dividing the output voltage Vout with the resistance elements R1 and R2 is applied to a non-inverting input terminal (+), so that the split voltage of the resistance elements R1 and R2 becomes equal to the standard voltage Vref.

    [0090] FIG. 8 is a circuit diagram showing an example of a semiconductor device having a voltage generation circuit that is an analog circuit.

    [0091] Referring to FIG. 8, in a voltage detection circuit 37, the numerical reference 31 denotes an operational amplifier. The standard voltage generation circuit 29 is connected to a inverting input terminal (-) so that the standard voltage Vref is applied. A voltage of a terminal to be measured, which voltage is input from the input terminal (Vsens) is divided by the splitting resistance elements R1 and R2 so that the divided voltage is input to the non-inverting input terminal (+) of the operational amplifier 31. The output of the operational amplifier 31 is output to the outside via the output terminal (Vout) 41.

    [0092] In the voltage detection circuit 37, if the voltage at the terminal to be measured is high so that the voltage divided by the splitting resistance elements R1 and R2 is higher than the standard voltage Vref, an H level of the output of the operational amplifier 31 is maintained.

    [0093] If the voltage at the terminal to be measured is decreased so that the voltage divided by the splitting resistance elements R1 and R2 is equal to or less than the standard voltage Vref, the output of the operational amplifier 31 becomes an L level.

    [0094] Generally, in the constant voltage generation circuit shown in FIG. 7 and the voltage detection circuit shown in FIG. 5, the standard voltage Vref from the standard voltage generation circuit is changed due to unevenness of a manufacturing process. Therefore, in order to respond to this change, the resistance value of the splitting resistance elements is adjusted by using a resistance element circuit (hereinafter "splitting resistance circuit") whereby the resistance value can be adjusted by cutting a fuse element as a splitting resistance element or by using a splitting resistance circuit whereby the resistance value can be adjusted by laser irradiation onto the resistance element.

    [0095] FIG. 9 is a circuit diagram showing an example of a semiconductor device having a splitting resistance circuit that is an analog circuit. FIG. 10 is a plan view of an example of a lay-out of a fuse element part of the splitting resistance circuit. The lay-out of the resistance element part is the same as that shown in FIG. 4(A).

    [0096] As shown in FIG. 9, a resistance element Rbottom, "m + 1 ("m" is a positive integer)" pieces of resistance elements RT, RT1, ..., RTm, and a resistance element Rtop are connected in series. Corresponding to the resistance elements, fuse elements RL0, RL1, ..., RLm are connected in parallel to the corresponding resistance elements RT, RT1, ..., RTm.

    [0097] FIG. 10 is a plan view of an example of a lay-out of a fuse element part of the splitting resistance circuit.

    [0098] As shown in FIG. 10, the fuse elements RL0, RL1, ..., RLm are formed by a polysilicon pattern having sheet resistance of , for example, approximately 20 Ω through 40 Ω.

    [0099] Values of the resistance elements RT, RT1, ..., RTm are increased in a binary number manner from a side of the resistance element Rbottom. In other words, the resistance value of the resistance element RTn is 2n times the unit value that is the resistance value of the resistance elements RT0.

    [0100] In FIG. 4 and FIG. 10, electrical connection between the electrodes A-A, electrodes B-B, electrodes C-C, and electrodes D-D are made by the metal wiring pattern.

    [0101] Thus, in the splitting resistance circuit wherein precision of the ratio between the resistance element is critical, in order to improve forming precision in the manufacturing process, unit resistance elements made of a couple of the resistance elements and the fuse elements are connected in series and arrange in a ladder structure.

    [0102] In such a splitting resistance circuit, by cutting optional fuse elements RL0, RL1, ..., RLm with a laser light, it is possible to obtain a desirable series resistance value.

    [0103] As discussed above, with the metal thin film resistance element forming the semiconductor device of the embodiment of the present invention, it is possible to make the resistance value of the resistance element stable. Therefore, it is possible to improve the precision of the output voltage of the splitting resistance circuit shown in FIG. 9.

    [0104] In a case where the splitting resistance circuit shown in FIG. 9 is applied to the splitting resistance elements R1 and R2 of the constant voltage generation circuit 25 shown in FIG. 1, for example, the end of the resistance element Rbottom is grounded and the end of the resistance element Rtop is connected to a drain of the PMOS 33.

    [0105] In addition, a terminal NodeL between the resistance element Rbottom and RT0 or a terminal NodeM between the resistance element Rtop and RTm is connected to a non-inverting input terminal of the operational amplifier 31.

    [0106] According to the splitting resistance circuit where the present invention is applied, it is possible to improve precision of the output voltage of the splitting resistance circuit. Therefore, it is possible to make the output voltage of the constant voltage generation circuit 25 stable.

    [0107] In a case where the splitting resistance circuit shown in FIG. 9 is applied to the splitting resistance elements R1 and R2 of the voltage detection circuit 37 shown in FIG. 8, for example, the end of the resistance element Rbottom is grounded and the end of the resistance element Rtop is connected to the input terminal 61.

    [0108] In addition, a terminal NodeL between the resistance element Rbottom and RT0 or a terminal NodeM between the resistance element Rtop and RTm is connected to a non-inverting input terminal of the operational amplifier 31.

    [0109] According to the splitting resistance circuit where the present invention is applied, it is possible to improve precision of the output voltage of the splitting resistance circuit. Therefore, it is possible to improve the precision of the voltage detection ability of the voltage detection circuit 37.

    [0110] FIG. 11 is a graph showing an output voltage distribution after trimming in plural samples of the constant voltage generation circuit where an embodiment of the present invention is applied. More specifically, FIG. 11(A) is a graph in a case of the present invention and FIG. 11(B) is a graph of a comparison example wherein the vertical axis shows frequency and the horizontal axis shows an output voltage.

    [0111] A metal thin film resistance element of a sample in the case of FIG. 11(A) is formed under conditions of the example discussed with reference to FIG. 4.

    [0112] A metal thin film resistance body of a comparison example of FIG. 11(B) includes the turning part of the related art discussed with reference to FIG. 3. Other conditions are same as the conditions of the embodiments discussed with reference to FIG. 4.

    [0113] In the constant voltage generation circuit (A) where the present invention is applied, compared to the comparison example (B), standard deviation σ is improved so as to be approximately half of the standard deviation of (B).

    [0114] The present invention is not limited to these embodiments, but variations and modifications may be made without departing from the scope of the present invention.

    [0115] While the examples of the semiconductor device where the splitting resistance circuit having the metal thin film resistance element of the present invention is applied is discussed with reference to FIG. 4 and FIG. 7 through FIG. 10, the semiconductor device where the splitting resistance circuit is applied is not limited to the semiconductor device having the constant voltage generation circuit or the semiconductor device having the voltage detection circuit. The present invention may be applied to any semiconductor device having the splitting resistance circuit.

    [0116] In addition, the semiconductor device where the metal thin film resistance element of the present invention is applied is not limited to the semiconductor device having the splitting resistance circuit. The present invention may be applied to any semiconductor device having the metal thin film resistance element.


    Claims

    1. A semiconductor device, comprising:

    a lower layer side insulation film (5);

    a wiring pattern (7) formed on the lower layer side insulation film (5);

    a base insulation film (9) formed on the lower layer side insulation film (5) and the wiring pattern (7); and

    a plurality of metal thin film resistance elements (13) formed on the base insulation film (9) ;

    wherein a connection hole (11) is formed in the base insulation film (9) on the wiring pattern (7);

    the wiring pattern (7) and the metal thin film resistance element (13) are electrically connected in the connection hole (11); and

    the metal thin film resistance element (13) has a belt shape part (13a) arranged separately from the connection hole (11) and a connection part (13b) continuously formed with one end of the belt shape part (13a) and connected to the wiring pattern (7) in the connection hole (11);

    characterised in that for each of the connection parts (13b) of at least two respectively separated elements of the plurality of metal thin film resistance elements (13) a portion of the connection part is formed in a common connection hole (11);

    wherein a gap is in between the portions of the respective connection parts (13b) formed in the connection hole, and the gap is in the connection hole, and

    wherein the connection parts belong to respective separate metal thin film elements.


     
    2. The semiconductor device as claimed in claim 1,
    wherein the connection part (13b) is wider than the belt shape part (13a).
     
    3. The semiconductor device as claimed in claim 1 or 2,
    wherein the gap between the connection parts (13b) neighboring in the connection hole (11) is narrower than a gap between neighboring belt shape parts (13a).
     
    4. The semiconductor device as claimed in claim 1, 2 or 3, further comprising:

    a first connection part (13c) made of a metal thin film whose material is the same as the material of the metal thin film resistance element (13), which first connection part (13c) is configured to connect the connection parts (13b) neighboring in the connection hole (11).


     
    5. The semiconductor device as claimed in any one of the preceding claims, further comprising:

    a second connection part (13d) made of a metal thin film whose material is the same as the material of the metal thin film resistance element (13), which second connection part (13d) is configured to connect the connection parts (13b) neighboring outside the connection hole (11) at a side opposite to the belt shape part (13a) from the connection hole (11).


     
    6. A semiconductor device, comprising:

    a splitting resistance circuit configured to obtain high precision of a voltage output by splitting the voltage output with a plurality of resistance elements and adjusting the voltage output by cutting the fuse element;

    wherein the resistance element is formed by the metal thin film resistance element as set forth in any one of the preceding claims.


     
    7. A semiconductor device, comprising:

    a first splitting resistance circuit configured to split an input voltage and supply a split voltage;

    a standard voltage generation circuit configured to supply a standard voltage; and

    a voltage detection circuit having a comparison circuit configured to compare the split voltage from the first splitting resistance circuit and the standard voltage from the standard voltage generation circuit;

    wherein the first splitting resistance circuit has the splitting resistance circuit as set forth in claim 6.


     
    8. A semiconductor device, comprising:

    an output driver configured to control output of an input voltage;

    a first splitting resistance circuit configured to split an output voltage and supply a split voltage;

    a standard voltage generation circuit configured to supply a standard voltage; and

    a constant voltage generation circuit having a comparison circuit configured to compare the split voltage from the first splitting resistance circuit and the standard voltage from the standard voltage generation circuit;

    wherein the first splitting resistance circuit has the splitting resistance circuit as set forth in claim 6.


     


    Ansprüche

    1. Halbleitervorrichtung, die umfasst:

    einen Isolierfilm (5) auf Seiten einer unteren Schicht;

    ein Verdrahtungsmuster (7), das auf dem Isolierfilm (5) auf Seiten der unteren Schicht gebildet ist;

    einen Basisisolierfilm (9), der auf dem Isolierfilm (5) auf Seiten der unteren Schicht und dem Verdrahtungsmuster (7) gebildet ist; und

    mehrere Metalldünnschicht-Widerstandselemente (13), die auf dem Basisisolierfilm (9) gebildet sind;

    wobei in dem Basisisolierfilm (9) auf dem Verdrahtungsmuster (7) ein Verbindungsloch (11) gebildet ist;

    das Verdrahtungsmuster (7) und das Metalldünnschicht-Widerstandselement (13) in dem Verbindungsloch (11) elektrisch verbunden sind; und

    das Metalldünnschicht-Widerstandselement (13) einen gürtelförmigen Teil (13a), der getrennt von dem Verbindungsloch (11) angeordnet ist, und einen Verbindungsteil (13b), der mit einem Ende des gürtelförmigen Teils (13a) einteilig ausgebildet ist und mit dem Verdrahtungsmuster (7) in dem Verbindungsloch (11) verbunden ist;

    dadurch gekennzeichnet, dass für jeden der Verbindungsteile (13b) von jeweils wenigstens zwei getrennten Elementen der mehreren Metalldünnschicht-Widerstandselemente (13) ein Abschnitt des Verbindungsteils in einem gemeinsamen Verbindungsloch (11) gebildet ist;

    wobei zwischen den Abschnitten der jeweiligen Verbindungsteile (13b), die in dem Verbindungsloch gebildet sind, ein Spalt vorhanden ist und sich der Spalt in dem Verbindungsloch befindet und

    wobei die Verbindungsteile zu entsprechenden getrennten Metalldünnschichtelementen gehören.


     
    2. Halbleitervorrichtung nach Anspruch 1,
    wobei der Verbindungsteil (13b) breiter als der gürtelförmige Teil (13a) ist.
     
    3. Halbleitervorrichtung nach Anspruch 1 oder 2,
    wobei der Spalt zwischen den Verbindungsteilen (13b) in der Nähe des Verbindungslochs (11) schmaler ist als ein Spalt zwischen benachbarten gürtelförmigen Teilen (13a).
     
    4. Halbleitervorrichtung nach Anspruch 1, 2 oder 3, die ferner umfasst:

    einen ersten Verbindungsteil (13c), der aus einer Metalldünnschicht hergestellt ist, deren Material gleich dem Material des Metalldünnschicht-Widerstandselements (13) ist, wobei der erste Verbindungsteil (13c) konfiguriert ist, um die Verbindungsteile (13b), die zu dem Verbindungsloch (11) benachbart sind, zu verbinden.


     
    5. Halbleitervorrichtung nach einem der vorhergehenden Ansprüche, die ferner umfasst:

    einen zweiten Verbindungsteil (13d), der aus einer Metalldünnschicht hergestellt ist, deren Material gleich dem Material des Metalldünnschicht-Widerstandselements (13) ist, wobei der zweite Verbindungsteil (13d) konfiguriert ist, die Verbindungsteile (13b), die außerhalb des Verbindungslochs (11) zu ihm benachbart sind, auf einer Seite gegenüber dem gürtelförmigen Teil (13a) in Bezug auf das Verbindungsloch (11) zu verbinden.


     
    6. Halbleitervorrichtung, die umfasst:

    eine Widerstandsaufteilungsschaltung, die konfiguriert ist, einen hochgenauen Spannungsausgang zu erhalten, indem sie den Spannungsausgang mit mehreren Widerstandselementen unterteilt und den Spannungsausgang durch Unterbrechen des Schmelzelements einstellt;

    wobei das Widerstandselement durch das Metalldünnschicht-Widerstandselement nach einem der vorhergehenden Ansprüche gebildet ist.


     
    7. Halbleitervorrichtung, die umfasst:

    eine erste Widerstandsaufteilungsschaltung, die konfiguriert ist, eine Eingangsspannung zu teilen und eine geteilte Spannung zuzuführen;

    eine Standardspannung-Erzeugungsschaltung die konfiguriert ist, eine Standardspannung zuzuführen; und

    eine Spannungsdetektionsschaltung mit einer Vergleichsschaltung, die konfiguriert ist, die geteilte Spannung von der ersten Widerstandsaufteilungsschaltung und die Standardspannung von der Standardspannung-Erzeugungsschaltung zu vergleichen;

    wobei die erste Widerstandsaufteilungsschaltung die Widerstandsaufteilungsschaltung nach Anspruch 6 besitzt.


     
    8. Halbleitervorrichtung, die umfasst:

    einen Ausgangstreiber, der konfiguriert ist, die Ausgabe einer Eingangsspannung zu steuern;

    eine erste Widerstandsaufteilungsschaltung, die konfiguriert ist, eine Ausgangsspannung zu teilen und eine geteilte Spannung zuzuführen;

    eine Standardspannung-Erzeugungsschaltung, die konfiguriert ist, eine Standardspannung zuzuführen; und

    eine Konstantspannung-Erzeugungsschaltung mit einer Vergleichsschaltung, die konfiguriert ist, die geteilte Spannung von der ersten Widerstandsaufteilungsschaltung und die Standardspannung von der Standardspannung-Erzeugungsschaltung zu vergleichen;

    wobei die erste Widerstandsaufteilungsschaltung die Widerstandsaufteilungsschaltung nach Anspruch 6 besitzt.


     


    Revendications

    1. Dispositif à semi-conducteurs, comprenant :

    un film d'isolement côté couche inférieure (5) ;

    un motif de câblage (7) formé sur le film d'isolement côté couche inférieure (5) ;

    un film d'isolement de base (9) formé sur le film d'isolement côté couche inférieure (5) et le motif de câblage (7) ; et

    une pluralité d'éléments de résistance à film mince métallique (13) formés sur le film d'isolement de base (9) ;

    dans lequel un trou de connexion (11) est formé dans le film d'isolement de base (9) sur le motif de câblage (7) ;

    le motif de câblage (7) et l'élément de résistance à film mince métallique (13) sont connectés électriquement dans le trou de connexion (11) ; et

    l'élément de résistance à film mince métallique (13) comporte une partie en forme de bande (13a) agencée séparément du trou de connexion (11) et une partie de connexion (13b) formée continûment avec une extrémité de la partie en forme de bande (13a) et connectée au motif de câblage (7) dans le trou de connexion (11) ;

    caractérisé en ce que, pour chacune des parties de connexion (13b) d'au moins deux éléments respectivement séparés de la pluralité d'éléments de résistance à film mince métallique (13), une partie de la partie de connexion est formée dans un trou de connexion (11) commun ;

    dans lequel un espace se trouve entre les parties des parties de connexion (13b) respectives formées dans le trou de connexion, et l'espace se trouve dans le trou de connexion, et

    dans lequel les parties de connexion appartiennent à des éléments à film mince métallique séparés respectifs.


     
    2. Dispositif à semi-conducteurs selon la revendication 1,
    dans lequel la partie de connexion (13b) est plus large que la partie en forme de bande (13a).
     
    3. Dispositif à semi-conducteurs selon la revendication 1 ou 2,
    dans lequel l'espace entre les parties de connexion (13b) voisines dans le trou de connexion (11) est plus étroit qu'un espace entre les parties en forme de bande voisines (13a).
     
    4. Dispositif à semi-conducteurs selon la revendication 1, 2 ou 3, comprenant en outre :

    une première partie de connexion (13c) constituée d'un film mince métallique dont le matériau est identique au matériau de l'élément de résistance à film mince métallique (13), laquelle première partie de connexion (13c) est configurée pour connecter les parties de connexion (13b) voisines dans le trou de connexion (11).


     
    5. Dispositif à semi-conducteurs selon l'une quelconque des revendications précédentes, comprenant en outre :

    une deuxième partie de connexion (13d) constituée d'un film mince métallique dont le matériau est identique au matériau de l'élément de résistance à film mince métallique (13),

    laquelle deuxième partie de connexion (13d) est configurée pour connecter les parties de connexion (13b) voisines à l'extérieur du trou de connexion (11) d'un côté opposé à la partie en forme de bande (13a) par rapport au trou de connexion (11).


     
    6. Dispositif à semi-conducteurs, comprenant :

    un circuit de résistances de division configuré pour obtenir une sortie de tension de précision élevée en divisant la sortie de tension par une pluralité d'éléments de résistance et en ajustant la sortie de tension en coupant l'élément de fusible ;

    dans lequel l'élément de résistance est formé par l'élément de résistance à film mince métallique selon l'une quelconque des revendications précédentes.


     
    7. Dispositif à semi-conducteurs, comprenant :

    un premier circuit de résistances de division configuré pour diviser une tension d'entrée et fournir une tension divisée ;

    un circuit de génération de tension standard configuré pour fournir une tension standard ; et

    un circuit de détection de tension comportant un circuit de comparaison configuré pour comparer la tension divisée provenant du premier circuit de résistances de division et la tension standard provenant du circuit de génération de tension standard ;

    dans lequel le premier circuit de résistances de division comporte le circuit de résistances de division selon la revendication 6.


     
    8. Dispositif à semi-conducteurs, comprenant :

    un dispositif de commande de sortie configuré pour commander la sortie d'une tension d'entrée ;

    un premier circuit de résistances de division configuré pour diviser une tension de sortie et fournir une tension divisée ;

    un circuit de génération de tension standard configuré pour fournir une tension standard ; et

    un circuit de génération de tension constante comportant un circuit de comparaison configuré pour comparer la tension divisée provenant du premier circuit de résistances de division et la tension standard provenant du circuit de génération de tension standard ;

    dans lequel le premier circuit de résistances de division comporte le circuit de résistances de division selon la revendication 6.


     




    Drawing





























    Cited references

    REFERENCES CITED IN THE DESCRIPTION



    This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

    Patent documents cited in the description