(19)
(11)EP 0 215 583 A3

(12)EUROPEAN PATENT APPLICATION

(88)Date of publication A3:
23.08.1989 Bulletin 1989/34

(43)Date of publication A2:
25.03.1987 Bulletin 1987/13

(21)Application number: 86306397.0

(22)Date of filing:  19.08.1986
(51)International Patent Classification (IPC)4H01L 27/06, H01L 23/52, H01L 21/82, H01L 21/90
(84)Designated Contracting States:
AT BE CH DE FR GB IT LI LU NL SE

(30)Priority: 18.09.1985 US 777149
02.06.1986 US 869759

(71)Applicant: ADVANCED MICRO DEVICES, INC.
Sunnyvale, CA 94088 (US)

(72)Inventors:
  • Thomas, Mammen
    San Jose California 95120 (US)
  • Weinberg, Matthew
    Mt. View California 94043 (US)

(74)Representative: Sanders, Peter Colin Christopher et al
BROOKES & MARTIN High Holborn House 52/54 High Holborn
London WC1V 6SE
London WC1V 6SE (GB)


(56)References cited: : 
  
      


    (54)Bipolar and/or MOS devices fabricated on integrated circuit substrates


    (57) An improved integrated circuit structure is dis­closed comprising bipolar and/or MOS devices formed on the same substrate. Bipolar devices, when pres­ent, have at least the emitter and the collector contact portions formed from a polysilicon layer which results in raised contacts. The MOS devices are similarly formed with raised gate contact por­tions formed from the same polysilicon layer. Metal silicide is formed over at least a portion of the base, source, and drain regions to provide conductive paths to the base, source, and drain contacts. In one embodiment, the base, source, and drain contacts are also raised contacts formed from the same polysilicon layer to permit formation of a highly planarized structure with self-aligned con­tacts formed by planarizing an insulating layer formed over the structure sufficiently to expose the upper surface of the contacts.





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