(19)
(11)EP 0 088 487 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
27.12.1989 Bulletin 1989/52

(21)Application number: 83300225.6

(22)Date of filing:  18.01.1983
(51)International Patent Classification (IPC)4H04N 1/40, G11C 5/00

(54)

Semiconductor device, e.g. for controlling a thermal printing head

Halbleitervorrichtung, z.B. zum Steuern eines thermischen Druckkopfs

Dispositif semi-conducteur, p.ex. pour la commande d'une tête d'impression


(84)Designated Contracting States:
DE FR GB

(30)Priority: 19.01.1982 JP 6335/82

(43)Date of publication of application:
14.09.1983 Bulletin 1983/37

(73)Proprietor: FUJITSU LIMITED
Kawasaki-shi, Kanagawa 211 (JP)

(72)Inventors:
  • Suzuki, Hirokazu
    Yamato-shi Kanagawa 242 (JP)
  • Akiyama, Takehiro
    Midori-ku Yokohama-shi Kanagawa 227 (JP)

(74)Representative: Rackham, Stephen Neil et al
GILL JENNINGS & EVERY, Broadgate House, 7 Eldon Street
London EC2M 7LH
London EC2M 7LH (GB)


(56)References cited: : 
EP-A- 0 033 634
US-A- 4 151 611
JP-A-56 109 769
  
  • PATENTS ABSTRACTS OF JAPAN, vol. 3, no. 136 (E-151), 13th November 1979; & JP - A - 54 114 927 (FUJITSU K.K.) 09-07-1979
  • PATENTS ABSTRACTS OF JAPAN, vol. 4, no. 115 (P-23)[597], 16th August 1980; & JP - A - 55 70 987 (HITACHI SEISAKUSHO K.K.) 28-05-1980
  • PATENTS ABSTRACTS OF JAPAN, vol. 4, no. 115 (P-23)[597], 16th August 1980; & JP - A - 55 70 986 (HITACHI SEISAKUSHO K.K.) 28-05-1980
  
Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


Description


[0001] The present invention relates to a semiconductor device, more particularly to a semiconductor device which is used, for example, for controlling and driving thermal heads of a thermal printer used in a facsimile apparatus to decrease their power consumption.

[0002] JP-A-55-70987 describes a logic control circuit which is only powered when selected by a chip selection signal.

[0003] EP-A-0033634 describes a thermal recording head semiconductor driving device comprising a first circuit which is activated when power is applied to the semiconductor device and which includes input buffer circuits and output driver circuits and a second circuit including data storing circuits which receive input signals through the input buffer circuits and whose output terminals are connected to the inputs of the output driver circuits.

[0004] According to this invention such a device is formed on a single semiconductor chip and also includes a power switch circuit which receives a power control signal and through which the second circuit is supplied with power only when both power and the power control signal are applied to the semiconductor device.

[0005] This overcomes a problem which arises with semiconductor devices comprising a plurality of circuit portions, some of which require a continuous supply of power, while others require a supply of power for only part of the operating time of the semiconductor device. When such a semiconductor device is provided with a single switch circuit which turns on and off the power for all the circuit portions together, there is no problem with the above-mentioned former circuit portions, but power is wasted on the latter circuit portions. The result is a larger than necessary power consumption and heat generation in the semiconductor device.

[0006] The invention is particularly useful in semiconductor devices used, for example, in thermal printers in facsimile apparatus. Specifically, integrated circuit (IC) devices are used to supply signals to the thermal heads to control the drive thereof. After the printing of characters in a line is finished, the printing paper is moved a predetermined length and the printing of next line is effected.

[0007] In a conventional facsimile apparatus, power supply voltage is applied to the IC devices even when not necessary, i.e., even when the printing paper is being moved and the printing operation by the thermal heads is not effected. The time for movement of the printing paper is about seven times as long as the time for the printing operation by the thermal heads. Therefore, the conventional IC device for controlling and driving the thermal heads wastes power and generates much heat.

[0008] In a thermal printer embodying the present invention, the output driver circuits of the first circuit of the semiconductor device are connected to the thermal heads and are controlled by the data storing circuits of the second circuit of the semiconductor device.

Figure 1 is a block circuit diagram of a semiconductor device according to an embodiment of the present invention;

Figure 2 is a circuit diagram of a power switch circuit used in the semiconductor device of Figure 1;

Figure 3 is a circuit diagram of elements constituting inner circuits of the semiconductor device of Figure 1;

Figure 4 is a block circuit diagram of a semiconductor device according to another embodiment of the present invention; and

Figure 5 is a waveform diagram of signals of every node of the semiconductor device of Figure 4.



[0009] Embodiments of the present invention will now be explained with reference to the attached drawings.

[0010] Figure 1 illustrates the schematic structure of a semiconductor-device according to an embodiment of the present invention and used for controlling and driving thermal heads of a facsimile apparatus. The semiconductor device of Figure 1 comprises a first circuit 1 always in an operating condition and a second circuit 2 sometimes in an operating condition and sometimes in a non- operating condition. The first circuit 1 and second circuit 2 are formed on a single semiconductor chip 3. A power supply circuit 4 is directly connected to the first circuit 1 through a power terminal 5' and a power line 5. The second circuit 2 is connected to the power supply circuit 4 through a power switch circuit 6 which is controlled by a control circuit 7.

[0011] The second circuit 2 is an internal circuit or a data storing circuit and comprises a plurality of flip-flop circuits 8 which are disposed, for example, in a matrix arrangement. The first circuit 1 is a peripheral circuit and comprises input buffer circuits 9, a clock circuit 10, output driver circuits 11, and the aforementioned power switch circuit 6. Each of the flip-flop circuits 8 of the second circuit 2 is, for example, a D-type flip-flop circuit whose data input terminal is connected to the output terminal of the input buffer circuit 9 disposed in the same row and whose clock input terminal is connected to the output terminal of the clock circuit 10. Each of the output terminals of the flip-flop circuits 8 is connected to the input terminal of the corresponding output driver circuit 11 whose output terminal is connected to a corresponding thermal head (not shown) of a facsimile apparatus, in Fig. 1, the illustration of the output buffers 11 is omitted except for the output buffers 11 connected to the flip-flop circuits 8 disposed in the uppermost row in the second circuit 2.

[0012] Figure 2 illustrates the detailed structure of the power switch circuit 6 arranged in the first circuit 1 and controlling the supply of power to the second circuit 2. The power switch circuit 6 comprises a pnp-type transistor 12 whose base is connected to an input terminal 27 connected to the control circuit 7 (Fig. 1), an npn-type Schottky barrier transistor 15 whose base is connected to the input terminal 27 through a Schottky barrier diode 13 and to the emitter of the transistor 12 through a diode 14, an npn-type transistor 16 whose base is connected to the emitter of the transistor 15, and Darlington-connected npn-type transistors 17 and 18. The power switch circuit 6 further comprises a Schottky barrier diode 19, a diode 20, and resistors 21, 22, 23, 24, and 25. The emitter of the transistor 18 is the output terminal 26 of the power switch circuit 6.

[0013] Figure 3 illustrates the circuit components of the flip-flop circuits 8 of the second circuit 2 of the semiconductor device of Fig. 1. Each of the flip- flop circuits 8 comprises integrated injection logic (IIL) gate circuits each comprising a switching transistor 31 and a current source circuit 33, a switching transistor 32 and a current source circuit 34, and so on. The current source circuits 33 and 34 are connected through a resistor 35. The resistor 35 is connected between a terminal 26' of an internal power source VD and the base of the transistor 31 and between the terminal 26' and the base of the transistor 32. The terminal 26' is connected to the output terminal 26 of the power switch circuit 6 shown in Fig. 2.

[0014] The operation of the above-mentioned semiconductor device will now be described. When the thermal printer of the facsimile device is used, i.e., a printing operation by the thermal printer is effected, the control circuit 7 (Fig. 1) generates a power control signal having a low potential level to activate the power switch circuit 6. Thus, the operating voltage VD, which is slightly lower than the power supply voltage V cc generated by the power supply circuit 4, is supplied to the second circuit 2 of the semiconductor device. That is, when the power control signal having a low potential level is supplied to the base of the transistor 12 of the power switch circuit 6 of Fig. 2 from the control circuit 7, the transistor 12 is turned on and the transistors 15 and 16 are turned off. Therefore, the Darlington connected transistors 17 and 18 are both turned on and the power supply voltage, whose potential is approximately Vcc-2VBE, is supplied to the second circuit 2 via the output terminal 26, where VBE is the base-emitter voltage of each of the transistors 17 and 18. In this case, since the power switching circuit 6 is constituted of logic circuits, the switching of the potential of the output terminal 26 thereof is performed much faster than that of the potential of the main power source, for example, VCCI whose switching time from low to high or vice versa is relatively long due to the capacitance in the main power circuits. Therefore, even if power is supplied to the second circuit 2 only when necessary, the operation of the second circuit 2 is not disturbed and the noises induced in the circuits are relatively small.

[0015] Simultaneously with the supply of power to the second circuit 2, print data are input to the input buffers 9 and the print data are set to the flip-flop circuits 8 under the control of clock pulses generated by the clock circuit 10. The data set in the flip- flop circuits 8 are transmitted to the output driver circuits 11 which drive the thermal heads connected thereto, whereby a printing operation according to the data is performed.

[0016] After the printing operation is finished, the printing paper is moved a predetermined length to position the next line under the thermal heads. When the movement of the printing paper begins, the control circuit 7 generates a control signal having a high potential level to turn off the power switch circuit 6. That is, the transistor 12 of Fig. 2 is turned off, the transistors 15 and 16 are turned on, and the Darlington connected transistors 17 and 18 are turned off, thereby cutting off the power supplied to the flip-flop circuits 8 constituting the second circuit 2.

[0017] In this manner, power is not supplied to the second circuit 2, during the period of movement of the printing paper. Since the movement period is about seven times as long as the printing period, cutting off the power to the second circuit 2 during the movement period enables a great decrease in the power consumption in the second circuit 2. It is also possible to decrease the heat generated by the semiconductor device. These advantageous effects become great when the power consumption of the second circuit 2 is large.

[0018] Power to the input buffers 9, the output driver circuits 11, and so on in the first circuit 1 is not cut off even during the movement period of the printing paper. This is because these circuits 9,11, and so on are connected to external circuits. If the power is cut off at every movement period, the input buffers 9 may effect the external circuits connected thereto and the output driver circuits 11 may generate undesirable data due to the noise generated by the switching of the power. The power consumption of these circuits 9, 11 and so on of the first circuit 1 is not so large, however, so do not significantly increase the power consumption of the semiconductor device.

[0019] After the above-mentioned movement of the printing paper is finished, the printing operation of the next line is effected. After the printing operation of the last line is finished, the operation of the thermal printers is stopped.

[0020] Figure 4 illustrates a circuit of a semiconductor device for controlling and driving a thermal printer of a facsimile apparatus according to another embodiment of the present invention. The semiconductor device of Fig. 4 comprises: a first circuit including circuits 43 through 47, 48-1, 48-2, - - -, 48-32, and 49 and a second circuit 40 including a shift register composed of D-type flip- flop circuits 41-1, 41-2, ---, 41-32 and latch circuits 42-1, 42-2, - - -, 42-32 which are composed of other D-type flip-flops. The first circuit is always activated and the second circuit 40 is activated only during the printing periods. In the first circuit, reference numerals 43, 46, 47, and 49 designate inverter type buffer amplifiers, reference numeral 45 designates a buffer amplifier, and reference numerals 48-1, 48-2, ---, 48-32, designate NAND gate-type output buffers. Reference numeral 44 designates a buffer amplifier or a power switch circuit which has substantially the same circuit structure comprising a combination of the circuit of Fig. 2 and an inverter connected to the input terminal 27 of the circuit of Fig. 2.

[0021] The operation of the semiconductor device of Fig. 4 will now be explained with reference to Fig. 5. Printing data PIX IN are serially input to the buffer amplifier 46 and to the shift register comprising D-type flip-flop circuits 41-1, 41-2, - - -, 41-32, and are sequentially shifted from the first flip- flop circuit 41-1 to the last flip-flop circuit 41-32 synchronously with clock pulses CLK. After the printing data are set in the flip-flop circuits 41-1, 41-2, - - -,41-32, a strobe signal STB applied to the clock input terminals of the flip-flop circuits 42-1, 42-2, - - -, 42-32 changes from low to high. At the rising edge of the strobe signal STB, the data stored in the flip-flop circuits 41-1, 41-2, - - -,41-32 of the shift register are latched by the flip-flop circuits 42-1, 42-2, ---, 42-32, respectively. The data latched by the flip-flop circuits 42-1, 42-2, - --, 42-32 are transmitted to the output buffer gates 48-1,48-2, - - -, 48-32, respectively, and are output therefrom to drive thermal heads (not shown) during the time interval in which an enable signal ENB is low. After the printing operation is finished, a power control signal IPW is changed from high to low and the power source to the second circuit 40 is cut off. The power control signal IPW is changed from low to high at the beginning of input of the printing data PIX IN to the shift register, so that the second circuit 40 is not activated during each movement period of the printing paper.


Claims

1. A semiconductor device comprising a first circuit (1) which is activated when power is applied to the semiconductor device and which includes input buffer circuits (9) and output driver circuits (11) and a second circuit including data storing circuits (8) which receive input signals through the input buffer circuits (9) and whose output terminals are connected to the inputs of the output driver circuits (11); characterised in that the device is formed on a single semiconductor chip and also includes a power switch circuit (6) which receives a power control signal (7) and through which the second circuit (8) is supplied with power only when both power and the power control signal (7) are applied to the semiconductor device.
 
2. A semiconductor device according to claim 1, wherein the power switch circuit (6) comprises switching transistors which constitute a Darlington circuit (17,18) and which are turned on and off under the control of said power control signal (7).
 
3. A semiconductor device according to claim 2, wherein the power switch circuit comprises a pnp-type emitter follower transistor (12) which receives the power control signal, an npn-type emitter follower transistor (15) which receives the output signal of the pnp-type emitter-follower transistor, an npn-type inverter transistor (16) which receives the output signal of the npn-type emitter-follower transistor (15), the said Darlington circuit comprising npn-type transistors which receive the output signal of the npn-type inverter transistor and which switch on and off the power supplied to the second circuit.
 
4. A semiconductor device according to any preceding claim, wherein the power switch circuit (6) is included in the first circuit (1).
 
5. A semiconductor device according to claim 4, wherein the input buffer circuits (9) and output driver circuits (11) included in the first circuit (1) are directly connected to circuits external to the chip, and the data storing circuits (8) included in the second circuit (2) are not directly connected to circuits external to the chip.
 
6. A semiconductor device according to any one of the preceding claims, wherein the data storing circuits comprise a plurality of flip-flop circuits (8) which receive input signals through the input buffer circuits (9) and whose output terminals are connected to the inputs of the output driver circuits (11).
 
7. A semiconductor device according to any one of claims 1 to 5, wherein the data storing circuit comprises a shift register constituted of a plurality of cascade-connected flip-flop circuits (41), and latch circuits (42) each constituted of a flip-flop circuit connected to the output terminal of one of the cascade-connected flip-flop circuits.
 
8. A semiconductor device according to claim 7, wherein the latch circuits (42) are connected to thermal heads of a thermal printer through the output driver circuits (11).
 
9. A thermal printer comprising a plurality of thermal heads and control means for supplying driving signals to the thermal heads, the control means comprising a semiconductor device having a first circuit (1) which is activated when power is applied to the semiconductor device and which includes input buffer circuits (9) and output driver circuits (11) and a second circuit including data storing circuits (8) which receive input signals through the input buffer circuits (9) and whose output terminals are connected to the inputs of the output driver circuits (11) the output driver circuits (11) being connected to the thermal heads and being controlled by the data storing circuits (8); characterised in that the semiconductor device is formed on a single semiconductor chip and also includes a power switch circuit (6) which receives a power control signal (7) and through which the second circuit (8) is supplied with power only when both power and the power control signal (7) are applied to the semiconductor device.
 
10. A thermal printer according to claim 9, including control means which for printing on a record medium, cause the power control signal (7) to be at a level such that the second circuit is supplied with power and, during movement of the record medium following the printing operation, and cause the power control signal (7) to be at a level such that the second circuit is not supplied with power.
 


Ansprüche

1. Halbleitervorrichtung mit einer ersten Schaltung (1), die aktiviert wird, wenn der Halbleitervorrichtung Energie zugeführt wird, und die Eingangspufferschaltungen (9) und Ausgangstreiberkreise (11) umfaßt, und einer zweiten Schaltung, die Datenspeicherschaltungen (8) umfaßt, welche Eingangssignale über die Eingangspufferschaltungen (9) empfängt und deren Ausgangsanschlüsse mit den Eingängen der Ausgangstreiberschaltungen (11) verbunden sind; dadurch gekennzeichnet, daß die Vorrichtung auf einem einzigen Halbleiterchip gebildet ist und auch einen Energieschaltkreis (6) enthält, welcher ein Energiesteuersignal (7) empfängt und durch welchen die zweite Schaltung nur dann mit Energie versorgt wird, wenn sowohl die Energie als auch des Energiesteuersignal (7) der Halbleitervorrichtung zugeführt werden.
 
2. Halbleitervorrichtung nach Anspruch 1, bei der der Energieschaltkreis (6) Schalttransistoren umfaßt, die eine Darlington-Schaltung (17, 18) bilden und die unter Steuerung des genannten Energiesteuersignals (7) ein- und aus-geschaltet werden.
 
3. Halbleitervorrichtung nach Anspruch 2, bei der der Energieschaltkreis einen pnp-Typ-Emitterfolgertransistor (12), der das Steuersignal empfängt, einen npn-Typ-Emitterfolgertransistor (15), der das Ausgangssignal des pnp-Typ-Emitterfolgertransistors empfängt und einen npn-Type-Invertertransistor (16), der das Ausgangssignal des npn-Typ-Emitterfolgertransistors (15) empfängt, umfaßt, und die genannte Darlington-Schaltung npn-Typ-Transistoren umfaßt, die das Ausgangssignal des npn-Typ-Invertertransistors empfangen und die die von der zweiten Schaltung zugeführte Energie ein- und ausschalten.
 
4. Halbleiterschaltung nach einem der vorhergehenden Ansprüche, bei der der Energieschaltkreis (6) in der ersten Schaltung (1) enthalten ist.
 
5. Halbleitervorrichtung nach Anspruch 4, bei dem die Eingangspufferschaltungen (9) und die Ausgangstreiberschaltungen (11), die in der ersten Schaltung (1) enthalten sind, direkt mit Schaltungen außerhalb des Chip verbunden sind, und die Datenspeicherschaltungen (8), die in der zweiten Schaltung (2) enthalten sind, nicht direkt mit den Schaltungen außerhalb des Chip verbunden sind.
 
6. Halbleitervorrichtung nach einem der vorhergehenden Ansprüche, bei der die Datenspeicherschaltungen eine Vielzahl von Flipflop-Schaltungen (8) umfassen, welche über die Eingangspufferschaltungen (9) Eingangssignale empfangen und deren Ausgangsanschlüsse mit dem Eingangen der Ausgangstreiberschaltungen (11) verbunden sind.
 
7. Halbleitervorrichtung nach einem der Ansprüche 1 bis 5, bei der die Datenspeicherschaltung ein Schieberegister umfaßt, das aus einer Vielzahl von in Kaskade verbundenen Flipflop-Schaltungen (41) besteht, und Halteschaltungen (42), die jeweils aus Flipflop-Schaltungen bestehen, die mit dem Ausgangsanschluß von einer der in Kaskade verbundenen Flipflop-Schaltungen verbunden sind.
 
8. Halbleitervorrichtung nach Anspruch 7, bei der die Halteschaltungen (42) mit Thermoköpfen eines Thermodruckers über die Ausgangstreiberschaltungen (11) verbunden sind.
 
9. Thermodrucker mit einer Vielzahl von Thermoköfpen und Steuereinrichtungen, um den Thermoköpfen Treibersignale zuzuführen, welche Steuereinrichtungen eine Halbleitervorrichtung mit einer ersten Schaltung (1) umfassen, die aktiviert wird, wenn der Halbleitervorrichtung Energie zugeführt wird, und die Eingangspufferschaltungen (9) und Ausgangstreiberschaltungen (11) umfassen, und eine zweite Schaltung, die Datenspeich'erschaitungen (8) enthält, welche über die Eingangspufferschaltungen (9) Signale empfangen und deren Ausgangsanschlüsse mit den Eingangen der Ausgangstreiberschaltungen (11) verbunden sind, welche Ausgangstreiberschaltungen (11) mit den Thermoköpfen verbunden und durch die Datenspeicherschaltungen (8) gesteuert werden; dadurch gekennzeichnet, daß die Halbleitervorrichtung auf einem einzelnen Halbleiterchip gebildet ist und auch einen Energieschaltkreis (6) umfaßt, der ein Energiesteuersignal (7) empfängt und durch den die zweite Schaltung (8) nur dann mit Energie versorgt wird, wenn sowohl Energie als auch das Energiesteuersignal (7) der Halbleitervorrichtung zugeführt werden.
 
10. Thermodrucker nach Anspruch 9, mit Steuereinrichtungen, die, zum Drucken auf ein Aufzeichnungsmedium, bewirken, daß das Energiesteuersignal auf solch einem Pegel ist, daß die zweite Schaltung mit Energie versorgt wird, und während der dem Druckbetrieb folgenden Bewegung des Aufzeichnungsmediums, bewirken, daß das Energiesteuersignal auf solch einem Pegel ist, daß die zweite Schaltung nicht mit Energie versorgt wird.
 


Revendications

1. Dispositif à semiconducteur comprenant un premier circuit (1) qui est rendu actif quand une tension d'alimentation est appliquée au dispositif à semiconducteur et qui comprend des circuits tampons d'entrée (9) et des circuits de commande de sortie (11) et un deuxième circuit incluant des circuits de mémoire de données (8) qui reçoivent des signaux d'entrée par l'intermédiaire des circuits tampons d'entrée (9) et dont les bornes de sortie sont connectées aux entrées des circuits de commande de sortie (11); caractérisé en ce que le dispositif est réalisé sur une seule puce à semiconducteur et comprend également un circuit interrupteur d'alimentation (6) qui reçoit un signal de commande d'alimentation (7) et par l'intermédiaire duquel le deuxième circuit (8) ne reçoit une tension d'alimentation que lorsque le signal de tension d'alimentation et le signal de commande d'alimentation sont tous les deux appliqués au dispositif à semiconducteur.
 
2. Dispositif à semiconducteur selon la revendication 1, dans lequel le circuit interrupteur d'alimentation (6) comprend des transistors de commutation qui constituent un circuit de Darlington (17,18) et qui sont rendus conducteurs et bloqués sous la commande du signal de commande d'alimentation (7).
 
3. Dispositif à semiconducteur selon la revendication 2, dans lequel le circuit interrupteur d'alimentation comprend un transistor à émetteur suiveur du type pnp (12) qui reçoit le signal de commande d'alimentation, un transistor à émetteur suiveur du type npn (15) qui reçoit le signal de sortie du transistor à émetteur suiveur du type pnp, un transistor inverseur du type npn (16) qui reçoit le signal de sortie du transistor à émetteur suiveur du type npn (15), le circuit de Darlington comprenant des transistors du type npn qui reçoivent le signal de sortie du transistor inverseur du type npn et qui branchent et coupent l'alimentation fournie au deuxième circuit.
 
4. Dispositif à semiconducteur selon l'une quelconque des revendications 1 à 3, dans lequel le circuit interrupteur d'alimentation (6) est inclus dans le premier circuit (1).
 
5. Dispositif à semiconducteur selon la revendication 4, dans lequel les circuits tampons d'entrée (9) et les circuits de commande de sortie (11) inclus dans le premier circuit (1) sont directement connectés à des circuits extérieurs à la puce, et les circuits de mémoire de données (8) inclus dans le deuxième circuit (2) ne sont pas directement connectés à des circuits extérieurs à la puce.
 
6. Dispositif à semiconducteur selon l'une quelconque des revendications 1 à 5, dans lequel les circuits de mémoire de données comprennent un ensemble de circuits à bascule (8) qui reçoivent des signaux d'entrée par l'intermédiaire des circuits tampons d'entrée (9) et dont les bornes de sortie sont connectées aux entrées des circuits de commande de sortie (11).
 
7. Dispositif à semiconducteur selon l'une quelconque des revendications 1 à 5, dans lequel le circuit de mémoire de données comprend un registre à décalage constitué d'un ensemble de circuits à bascule connectés en cascade (41), et des circuits de verrouillage (42) constitués chacun d'un circuit à bascule connecté à la borne de sortie d'un des circuits à bascule connectés en cascade.
 
8. Dispositif à semiconducteur selon la revendication 7, dans lequel les circuits de verrouillage (42) sont connectés à des têtes thermiques d'une imprimante thermique par l'intermédiaire des circuits de commande de sortie (11).
 
9. Imprimante thermique comprenant un ensemble de têtes thermiques et des moyens de commande pour fournir des signaux d'entraînement aux têtes thermiques, les moyens de commande comprenant un dispositif à semiconducteur comportant un premier circuit (1) qui est rendu actif quand une tension d'alimentation est appliquée au dispositif à semiconducteur et qui comprend des circuits tampons d'entrée (9) et des circuits de commande de sortie (11) et un deuxième circuit incluant des circuits de mémoire de données (8) qui reçoivent des signaux d'entrée par l'intermédiaire des circuits tampons d'entrée (9) et dont les bornes de sortie sont connectées aux entrées des circuits de commande de sortie (11), les circuits de commande de sortie (11) étant connecte aux têtes thermiques et étant commandés par les circuits de mémoire de données (8); caractérisée en ce que le dispositif à semiconducteur est réalisé sur une seule puce à semiconducteur et comprend également un circuit interrupteur d'alimentation (6) qui reçoit un signal de commande d'alimentation (7) et par l'intermédiaire duquel le deuxième circuit (8) reçoit une tension d'alimentation uniquement quand le signal de tension d'alimentation et le signal de commande d'alimentation (7) sont tous les deux appliqués au dispositif à semiconducteur.
 
10. Imprimante thermique selon la revendication 9, incluant des moyens de commande qui, pour une impression sur un support d'enregistrement, font en sorte que le signal de commande d'alimentation (7) est à un niveau tel que le deuxième circuit reçoit une tension d'alimentation et, pendant un déplacement du support d'enregistrement suivant l'opération d'impression, font en sorte que le signal de commande d'alimentation (7) est à un niveau tel que le deuxième circuit ne reçoit pas de tension d'alimentation.
 




Drawing