(19)
(11)EP 2 466 659 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
01.04.2020 Bulletin 2020/14

(21)Application number: 11187163.8

(22)Date of filing:  28.10.2011
(51)International Patent Classification (IPC): 
H01L 33/62(2010.01)
H01L 33/00(2010.01)
H01L 33/64(2010.01)
H01L 33/38(2010.01)
H01L 33/60(2010.01)

(54)

Light emitting device

Lichtemittierende Vorrichtung

Dispositif électroluminescent


(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

(30)Priority: 16.12.2010 KR 20100129173

(43)Date of publication of application:
20.06.2012 Bulletin 2012/25

(73)Proprietor: LG Innotek Co., Ltd.
Seoul, 04637 (KR)

(72)Inventor:
  • Cho, Bum Chul
    100-714 Seoul (KR)

(74)Representative: Zardi, Marco 
M. Zardi & Co. SA Via Pioda 6
6900 Lugano
6900 Lugano (CH)


(56)References cited: : 
EP-A1- 0 691 660
US-A1- 2005 199 891
US-A1- 2010 012 955
EP-A2- 2 228 835
US-A1- 2008 102 277
  
  • Asi: "Electrically Conductive Adhesives", ASI Adhesives & Sealants, 1 July 2004 (2004-07-01), XP055091355, Retrieved from the Internet: URL:http://www.adhesivesmag.com/articles/p rint/electrically-conductive-adhesives-1 [retrieved on 2013-12-03]
  • S. M. Sze: "Physics of Semiconductor Devices" In: "Physics of Semiconductor Devices", 1 January 2007 (2007-01-01), Wiley-Interscience, New Jersey, XP055091348, pages 190-191, * page 190; table 5 *
  
Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


Description

CROSS-REFERENCE TO RELATED APPLICATION



[0001] This application claims priority from Korean Application No. 10-2010-0129173, filed on December 16, 2010.

BACKGROUND


1. Field



[0002] Embodiments as disclosed relate to a light emitting device.

2. Background



[0003] A light emitting diode (hereinafter, referred to as LED) is an energy device converting electrical energy into light energy. The LED consumes low electric power and has a long life span. Therefore, the LED can be applied at a low cost.

[0004] As the advantages of the LED are becoming important issues, the LED is now widely used in various fields. However, due to the characteristic of the LED, high power application for high output has lower efficiency than that of low power application.

[0005] Therefore, a vertical type LED is now proposed which includes an efficient electric current application structure. Unlike a horizontal type LED obtained by etching a portion of a semiconductor layer and by forming an electrode in the etched portion, the vertical type LED is formed by placing directly an electrode on the top surface and the bottom surface of a semiconductor layer. Therefore, electric current can be efficiently applied from the electrode to the semiconductor layer. Accordingly, the vertical type LED achieves greater efficiency and greater power output than those of the horizontal type LED. Also, since the vertical type LED is cooled more easily than the horizontal type LED, the vertical type LED is able to easily radiate heat generated from the operation of the vertical type LED.

[0006] Meanwhile, since the electrode should be located on the top and the bottom surfaces of the semiconductor layer in the vertical type LED, the vertical type LED requires a different manufacturing process from that of the horizontal type LED. For example, after a semiconductor layer is grown on a growth substrate like a sapphire substrate, the growth substrate should be removed before subsequent processes are performed. Here, before the growth substrate is removed, the semiconductor layer is plated in advance or is wafer-bonded in order to support the semiconductor layer having no growth substrate.

[0007] In the wafer-bonding, due to the thermal expansion coefficient difference between the growth substrate like a sapphire substrate and a new bonding substrate, a crack may be generated in the semiconductor layer during a cooling process after the wafer-bonding process, and overall structure may get bent or twisted.

[0008] Accordingly, there is a necessity of developing a wafer substrate bonding structure, which is suitable to be applied to a wafer-bonding method of the vertical type LED, and of developing a light emitting diode using the same. Light emitting devices including wafer surface bonding structures are known from US 2005 0199891 A1 and EP 2 228835 A2.

[0009] Examples of wafer substrate bonding structures according to the prior art are known from "Asi: Electrically Conductive Adhesives"; ASI Adhesives and Sealants, 1 July 2004; XP055091355". Further examples are known from EP 0 691 660.

SUMMARY



[0010] According to the present invention there is provided a light emitting device according to claim 1.

[0011] One example useful for understanding the invention, although not an embodiment thereof, is a wafer substrate bonding structure including: a first substrate; and a conductive thin film which is disposed on the first substrate and includes a resin and conductive corpuscles included in the resin.

[0012] An embodiment of the invention as disclosed is a light emitting device including: a substrate; a conductive thin film disposed on the substrate; a reflective layer connected to the conductive thin film; an ohmic layer disposed on the conductive thin film; a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer disposed on the reflective layer; an insulation layer disposed between the reflective layer and the light emitting structure; and an electrode layer which is disposed on the light emitting structure, wherein the conductive thin film includes a resin and conductive corpuscles, wherein the reflective layer is electrically insulated from the light emitting structure by the insulation layer; and further comprising a first metal layer disposed under the substrate, and a second metal layer disposed between the substrate and the conductive film; and each of the conductive corpuscles includes a plastic particle plated with an Au-Sn alloy having a low melting point.

[0013] Further another embodiment as disclosed is a light emitting device including: a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer, wherein the first semiconductor layer has an exposed area; a first electrode which is disposed on the exposed area of the first semiconductor layer; a second electrode which is disposed on the second semiconductor layer; and a wafer substrate bonding structure contacting with the first electrode and the second electrode and including a conductive thin film which includes a resin and conductive corpuscles.

BRIEF DESCRIPTION OF THE DRAWINGS



[0014] Arrangements and embodiments may be described in detail with reference to the following drawings in which like reference numerals refer to like elements and wherein:

Figs. 1 to 4 are views showing a configuration of a wafer substrate bonding structure according to an examples useful for understanding the invention, although not an embodiment thereof;

Figs. 5a to 5e are views describing a manufacturing process of a light emitting device according to the embodiment of the invention; and

Figs. 6a to 6c are views describing a manufacturing process using the wafer substrate bonding structure according to Figs. 1 to 4.


DETAILED DESCRIPTION



[0015] A thickness or a size of each layer may be magnified, omitted or schematically shown for the purpose of convenience and clearness of description. The size of each component may not necessarily mean its actual size.

[0016] It should be understood that when an element is referred to as being 'on' or "under" another element, it may be directly on/under the element, and/or one or more intervening elements may also be present. When an element is referred to as being 'on' or 'under', 'under the element' as well as 'on the element' may be included based on the element.

[0017] An embodiment may be described in detail with reference to the accompanying drawings.

[0018] Figs. 1 to 4 are views showing a configuration of a wafer substrate bonding structure given as example useful for understanding the invention, although not an embodiment thereof.

[0019] Referring to Fig. 1, a wafer substrate bonding structure 100 is formed to include a first substrate 110, a conductive thin film 120 and a second substrate 130, all of which are sequentially stacked.

[0020] The first substrate 110 is a conductive substrate. For example, the first substrate 110 is formed of a material such as ZnO, SiO2 and SnO2 and the like.

[0021] The conductive thin film 120 has a form in which a plurality of conductive corpuscles are distributed in a resin. The conductive corpuscle may have a diameter of several micrometers. For example, the conductive corpuscle may have a shape in which a monodisperse special plastic particle having a diameter of several micrometers is plated with Ni, Au or Cu in the form of a thin film having a thickness of about 100 nm. The conductive corpuscle has a shape in which the monodisperse special plastic particle is plated with an alloy including Au-Sn as a material having a low melting point. When the conductive corpuscle plated with an alloy including a material having a low melting point is included in the conductive thin film 120, the conductive thin film 120 is not bent or twisted during a cooling process. Besides, during a bonding process, the conductive corpuscle is distorted and melted to stick to each other. As a result, a heat radiating characteristic is enhanced and an adhesive strength may be more increased. The resin may include at least one of a thermosetting resin, a thermoplastic resin and a curing agent. An epoxy resin may be used as the thermosetting resin. An acrylic resin may be used as the thermoplastic resin. The conductive thin film may be, for example, an anisotropic conductive film (ACF).

[0022] The second substrate 130 is stacked on the conductive thin film 120. The second substrate 130 may be either a predetermined substrate (for example, a sapphire substrate and the like) on which a device structure is formed or a substrate having a thermal expansion coefficient different from that of the first substrate 110, such as a semiconductor layer which is a portion of the device structure, and the like.

[0023] Since the first substrate 110 is formed of a material having different properties from those of the material of the second substrate 130, the first and the second substrates 110 and 130 have mutually different thermal expansion coefficients. As the thermal expansion coefficient difference becomes larger, it becomes more difficult to bond them. For example, it is assumed that the thermal expansion coefficient of the first substrate 110 is greater than that of the second substrate 130. Then, when a bonding process of the first substrate 110 and the second substrate 130 is performed at a high temperature, the first substrate 110 relatively more expands than the second substrate 130. Therefore, the first substrate 110 or the second substrate130 may be damaged. However, according to the embodiment, since the conductive thin film 120 is included between the first substrate 110 and the second substrate 130, and the conductive thin film 120 is able to function as a bond between the first substrate 110 and the second substrate 130, the bonding process of the first substrate 110 and the second substrate 130 can be performed at a low temperature. Accordingly, since the bonding process is performed at a low temperature even though the thermal expansion coefficient difference between the first substrate 110 and the second substrate 130 is large, the expansion difference between the first and the second substrates 110 and 130 is insignificant in their bonding and the first and the second substrates 110 and 130 can be securely bonded to each other. Further, since the first and the second substrates 110 and 130 are bonded with the conductive thin film 120 placed therebetween, large-area bonding can be performed and a contact resistance can be hereby considerably reduced. Meanwhile, the resin constituting the conductive thin film 120 may relieve stress between the first substrate 110 and the second substrate 130.

[0024] In the next place, referring to Fig. 2, a wafer substrate bonding structure 200 given as another example for understanding the invention, although not an embodiment thereof, is formed to include a first metal layer 210, a first substrate 220, a second metal layer 230, a conductive thin film 240 and a second substrate 250, all of which are sequentially stacked.

[0025] The first substrate 220 is a p-type semiconductor substrate or an n-type semiconductor substrate. The conductive thin film 240 and the second substrate 250 are formed of the same materials as those of the conductive thin film 120 and the second substrate 130 respectively. Therefore, detailed descriptions thereof will be omitted.

[0026] The second metal layer 230 according to the second embodiment helps the first substrate 220, i.e., a semiconductor substrate to come in ohmic contact with the conductive thin film 240. That is, the second metal layer 230 minimizes the potential barrier of a carrier of the first substrate 220, i.e., the semiconductor substrate and reduces the contact resistance between the first substrate 220 and the conductive thin film 240. The first metal layer 210 and the second metal layer 230 may be formed of an alloy including Cr, Ni and Au, Ag, an alloy including Ti and Ag, and the like. The first metal layer 210 and the second metal layer 230 may be formed of the same material or may be formed of mutually different materials.

[0027] Referring to Fig. 3, a wafer substrate bonding structure 300 according to a third example useful for understanding the invention, although not an embodiment thereof, may include a first substrate 310, a conductive thin film 320 and a second substrate 330, all of which are sequentially stacked.

[0028] The first substrate 310 is a p-type semiconductor substrate or an n-type semiconductor substrate. Since the second substrate 330 is the same as the second substrates 130 and 250 shown in Figs. 1 and 2, the description thereof will be omitted.

[0029] It is inevitable that a contact resistance occurs between the first substrate 310 and the conductive thin film 320. Surface metal of the conductive corpuscle included in the conductive thin film 320 is formed of a material enabling the first substrate 310 and the conductive thin film 320 to come in ohmic contact with each other. According to this, since the ohmic contact is formed between the first substrate 310 and the conductive thin film 320, the wafer substrate bonding structure 300 does not require the second metal layer 230 of the wafer substrate bonding structure 200 in Fig. 2, which helps the first substrate 220 to come in ohmic contact with the conductive thin film 240. That is, without a separate component, the first substrate 310 and the conductive thin film 320 are able to come in ohmic contact with each other, but also the first substrate 310 and the second substrate 330 are able to be bonded to each other at a low temperature.

[0030] For example, when it is assumed that a work function of the first substrate 310 is "fs" and a work function of the surface metal of the conductive corpuscle included in the conductive thin film 320 is "fm", the surface metal of the conductive corpuscle may be selected in such a relation that when the first substrate 310 is an n-type semiconductor substrate, "fm" < "fs", and when the first substrate 310 is a p-type semiconductor substrate, "fm" > "fs".

[0031] Lastly, referring to Fig. 4, a wafer substrate bonding structure 400 according to a fourth example useful for understanding the invention, although not an embodiment thereof, includes a first metal layer 410, a first substrate 420, a second metal layer 430, a conductive thin film 440, a second substrate 450 and an electrifier 460, all of which are sequentially stacked. The electrifier 460 penetrates the first substrate 420 and electrically connects the first metal layer 410 with the second metal layer 430.

[0032] The first substrate 420 according to the fourth embodiment may be a nonconductive substrate. Therefore, the electrifier 460 is required in order that the first metal layer 410 and the second metal layer 430 are electrically connected with each other with the first substrate 420 placed therebetween. To this end, the electrifier 460 is formed of a conductive material. Since other components, i.e., the conductive thin film 440 and the second substrate 450 are the same as those of the first and the second embodiments, the detailed descriptions will be omitted.

[0033] A manufacturing process of the wafer substrate bonding structure 400 according to the fourth example is described as follows.

[0034] First, the first metal layer 410 and the first substrate 420 are deposited and at least a portion of the first substrate 420 is removed by an etching process such that the first metal layer 410 is exposed through the removed portion. Then, the electrifier 460 is formed by forming a conductive metal in the exposed portion of the first metal layer 410, and then the second metal layer 430 is formed to cover the first substrate 420 and the electrifier 460. Subsequently, the conductive thin film 440 and the second substrate 450 are formed on the second metal layer 430. Consequently, the wafer substrate bonding structure 400 according to the fourth embodiment is completed.

[0035] Figs. 5a to 5e are cross sectional views for describing a manufacturing process of a light emitting device by using the wafer substrate bonding structure according to the embodiment of the present invention. A manufacturing process of a vertical type light emitting device will be described with reference to Figs. 5a to 5e.

[0036] First, referring to Fig. 5a, after a first semiconductor layer 511, an active layer 512 and a second semiconductor layer 513 are sequentially grown on a growth substrate 500, an ohmic layer 520 is formed on the second semiconductor layer 513. The growth substrate 500 may be a sapphire substrate. The first semiconductor layer 511 and the active layer 512 may be an N-GaN layer and a P-GaN layer respectively. The active layer 512 may be a multi-quantum well (MQW) having a plurality of quantum well structures.

[0037] Referring to Fig. 5b, an insulation layer 530 is formed on the ohmic layer 520. A reflective layer 540 is formed on the insulation layer 530. The insulation layer 530 prevents the semiconductor layers 511 and 513 from being short-circuited due to the reflective layer 540. The reflective layer 540 may be formed of a material such as Ag, Ni or Al and the like. The reflective layer 540 may have a central portion thicker than a peripheral portion.

[0038] Referring to Fig. 5c, the wafer substrate bonding structure 200 according to the embodiment is formed to cover the reflective layer 540 and the insulation layer 530. The wafer substrate bonding structure 200 includes the first metal layer 210, the first substrate 220, the second metal layer 230 and the conductive thin film 240, all of which are sequentially stacked. The wafer substrate bonding structure 200 is formed on the reflective layer 540 in such a manner that the conductive thin film 240 contacts with the reflective layer 540. The drawing shows only the wafer substrate bonding structure 200 of Fig. 2 as a wafer substrate bonding structure included in the light emitting device. The wafer substrate bonding structures shown in Figs. 1, 3 and 4 may be also used in examples not forming part of the claimed invention. According to the embodiment, thanks to the conductive thin film 240, the bonding process is performed at a low temperature and the stress according to the thermal expansion coefficient difference is relieved by the resin of the conductive thin film 240 though heat is added. While the drawing show that the conductive thin film 240 contacts with the reflective layer 540, a conductive or nonconductive substrate may be further formed on the conductive thin film 240. In other words, the conductive or the nonconductive substrate may be further formed between the conductive thin film 240 and the reflective layer 540.

[0039] Referring to Fig. 5d, after the growth substrate 500 is removed by performing a laser lift off (LLO) process, a pattern for forming a light emitting structure is formed by an etching process. Then, a protective layer 550 is formed to cover the lateral surface of the light emitting structure. The protective layer 550 may be formed of a material, for example, SiO2 and the like.

[0040] Referring to Fig. 5e, a light extraction structure, for example, a texturing structure may be formed on the first semiconductor layer 511 so as to improve light emission efficiency. An electrode layer 560 may be also formed on at least a portion of the first semiconductor layer 511.

[0041] Figs. 6a to 6c are cross sectional views for describing a manufacturing process of the light emitting device by using the wafer substrate bonding structure given as example useful for understanding the invention, although not an embodiment thereof. A manufacturing process of a flip-chip type light emitting device will be described with reference to Figs. 6a to 6c.

[0042] Referring to Fig. 6a, a buffer layer 610, a first semiconductor layer 621, an active layer 622 and a second semiconductor layer 623 are formed on a growth substrate 600.
The buffer layer 610 buffers the lattice mismatch between the growth substrate 600 and an Epi layer and may be formed of a non-doped GaN layer. The growth substrate 600 may be a sapphire substrate. The first semiconductor layer 621 and the active layer 623 may be an N-GaN layer and a P-GaN layer respectively. The active layer 622 may be a multi-quantum well (MQW) having a plurality of quantum well structures.

[0043] Referring to Fig. 6b, after an etching process is performed such that a portion of the first semiconductor layer 621 is exposed, a first electrode 630 and a second electrode 640 are formed on the exposed portion of the first semiconductor layer 621 and the second semiconductor layer 623 respectively.

[0044] Meanwhile, though not shown in the drawings, a reflective layer may be further formed on the second semiconductor layer 623 before the second electrode 640 is formed on the second semiconductor layer 623. The reflective layer is able to not only come in ohmic contact with the second semiconductor layer 623 but also reflect light generated from the active layer 622 toward the first semiconductor layer 621.

[0045] Referring to Fig. 6c, the flip-chip type light emitting device is completed by bonding the first electrode 630 and the second electrode 640 to the wafer substrate bonding structure 200. A description of a manufacturing process of the wafer substrate bonding structure 200 is the same as the foregoing description and will be omitted. While the drawing shows only the wafer substrate bonding structure 200 of Fig. 2 as a wafer substrate bonding structure, the wafer substrate bonding structures shown in Figs. 1, 3 and 4 may be also used. Meanwhile, it is recommended that an insulation layer (not shown) should be formed on the wafer substrate bonding structure 200 for the purpose of insulation between the first electrode 630 and the second electrode 640.

[0046] Although embodiments were described above, the scope of the present invention is defined by the claims.


Claims

1. A light emitting device comprising:

a substrate (220);

a conductive thin film (240) disposed on the substrate (220);

a reflective layer (540) contacts the conductive thin film (240);

an ohmic layer (520) disposed on the conductive thin film (240);

a light emitting structure including a first semiconductor layer (511), an active layer (512) and a second semiconductor layer (513) disposed on the reflective layer (540);

an insulation layer (530) disposed between the reflective layer (540) and the light emitting structure (511, 512, 513); and an electrode layer (560) disposed on the light emitting structure (511, 512, 513),

wherein the conductive thin film (240) includes a resin and conductive corpuscles,

wherein the reflective layer (540) is electrically insulated from the light emitting structure (511, 512, 513) by the insulation layer (530); and further comprising a first metal layer (210) disposed under the substrate (220), and a second metal layer (230) disposed between the substrate (220) and the conductive film (240);

wherein each of the conductive corpuscles includes a plastic particle plated with an Au-Sn alloy having a low melting point.


 
2. The light emitting device of claim 1, wherein a part of the conductive thin film (240) is disposed between the reflective layer (540) and the ohmic layer (520).
 
3. The light emitting device of claim 1, wherein the electrode layer (560) is disposed on at least a portion of the first semiconductor layer (511).
 
4. The light emitting device of claim 1, wherein the reflective layer (540) includes a central portion thicker than a peripheral portion.
 
5. The light emitting device of claim 4, including a protective layer (550) covering a lateral surface of the light emitting structure.
 
6. The light emitting device of claim 5, wherein the protective layer (550) is formed of SiO2.
 
7. The light emitting device of claim 1, wherein a texturing structure is on the first semiconductor layer (511).
 


Ansprüche

1. Lichtemittierungsvorrichtung umfassend:

ein Substrat (220);

einen leitenden dünnen Film (240), der auf dem Substrat (220) angeordnet ist;

eine reflektierende Schicht (540), die den leitenden dünnen Film (240) kontaktiert;

eine Ohm'sche Schicht (520), die auf dem leitenden dünnen Film (240) angeordnet ist;

eine Lichtemittierungsstruktur, die eine erste Halbleiterschicht (511), eine aktive Schicht (512) und eine zweite Halbleiterschicht (513) aufweist, die auf der reflektierenden Schicht (540) angeordnet ist;

eine Isolierungsschicht (530), die zwischen der reflektierenden Schicht (540) und der Lichtemittierungsstruktur (511, 512, 513) angeordnet ist; und

eine Elektrodenschicht (560), die auf der Lichtemittierungsstruktur (511, 512, 513) angeordnet ist,

wobei der leitende dünne Film (240) ein Harz und leitende Korpuskel aufweist,

wobei die reflektierende Schicht (540) durch die Isolierungsschicht (530) von der Lichtemittierungsstruktur (511, 512, 513) elektrisch isoliert ist; und ferner umfassend eine erste Metallschicht (210), die unter dem Substrat (220) angeordnet ist, und eine zweite Metallschicht (230), die zwischen dem Substrat (220) und dem leitenden Film (240) angeordnet ist;

wobei jedes der leitenden Korpuskel ein Kunststoffpartikel aufweist, das mit einer Au-Sn-Legierung mit einem niedrigen Schmelzpunkt plattiert ist.


 
2. Lichtemittierungsvorrichtung nach Anspruch 1, wobei ein Teil des leitenden dünnen Films (240) zwischen der reflektierenden Schicht (540) und der Ohm'schen Schicht (520) angeordnet ist.
 
3. Lichtemittierungsvorrichtung nach Anspruch 1, wobei die Elektrodenschicht (560) auf wenigstens einem Abschnitt der ersten Halbleiterschicht (511) angeordnet ist.
 
4. Lichtemittierungsvorrichtung nach Anspruch 1, wobei die reflektierende Schicht (540) einen zentralen Abschnitt aufweist, der dicker ist als ein Umfangsabschnitt.
 
5. Lichtemittierungsvorrichtung nach Anspruch 4, die eine Schutzschicht (550) aufweist, die eine Seitenfläche der Lichtemittierungsstruktur bedeckt.
 
6. Lichtemittierungsvorrichtung nach Anspruch 5, wobei die Schutzschicht (550) aus SiO2 ausgebildet ist.
 
7. Lichtemittierungsvorrichtung nach Anspruch 1, wobei sich eine Texturierungsstruktur auf der ersten Halbleiterschicht (511) befindet.
 


Revendications

1. Un dispositif d'émission de lumière comprenant :

un substrat (220) ;

un film mince conducteur (240) disposé sur le substrat (220) ;

une couche réfléchissante (540) en contact avec le film mince conducteur (240) ;

une couche ohmique (520) disposée sur le film mince conducteur (240) ;

une structure émettrice de lumière comprenant une première couche semi-conductrice (511), une couche active (512) et une deuxième couche semi-conductrice (513) disposée sur la couche réfléchissante (540) ;

une couche isolante (530) disposée entre la couche réfléchissante (540) et la structure émettrice de lumière (511, 512, 513) ; et une couche (560) formant électrode disposée sur la structure émettrice de lumière (511, 512, 513),

le film mince conducteur (240) comprenant une résine et des corpuscules conducteurs,

la couche réfléchissante (540) étant électriquement isolée de la structure émettrice de lumière (511, 512, 513) par la couche d'isolation (530) ; et comprenant en outre une première couche métallique (210) disposée sous le substrat (220), et une deuxième couche métallique (230) disposée entre le substrat (220) et le film conducteur (240) ;

chacun des corpuscules conducteurs comprenant une particule de matière plastique plaquée d'un alliage Au-Sn ayant un bas point de fusion.


 
2. Le dispositif d'émission de lumière selon la revendication 1, dans lequel une partie du film mince conducteur (240) est disposée entre la couche réfléchissante (540) et la couche ohmique (520).
 
3. Le dispositif d'émission de lumière selon la revendication 1, dans lequel la couche (560) formant électrode est disposée sur au moins une partie de la première couche semi-conductrice (511).
 
4. Le dispositif d'émission de lumière selon la revendication 1, dans lequel la couche réfléchissante (540) comprend une partie centrale plus épaisse qu'une partie périphérique.
 
5. Le dispositif d'émission de lumière selon la revendication 4, comprenant une couche de protection (550) recouvrant une surface latérale de la structure émettrice de lumière.
 
6. Le dispositif d'émission de lumière selon la revendication 5, dans lequel la couche de protection (550) est formée de SiO2.
 
7. Le dispositif d'émission de lumière selon la revendication 1, dans lequel une structure de texturation est présente sur la première couche semi-conductrice (511).
 




Drawing




















Cited references

REFERENCES CITED IN THE DESCRIPTION



This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

Patent documents cited in the description




Non-patent literature cited in the description